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Searched refs:MC_SEQ_WR_CTL_D1_LP (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dbtcd.h152 #define MC_SEQ_WR_CTL_D1_LP 0x2a80 macro
H A Dbtc_dpm.c1852 *out_reg = MC_SEQ_WR_CTL_D1_LP >> 2; in btc_check_s0_mc_reg_index()
2007 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in btc_initialize_mc_reg_table()
H A Dnid.h810 #define MC_SEQ_WR_CTL_D1_LP 0x2a80 macro
H A Dcikd.h703 #define MC_SEQ_WR_CTL_D1_LP 0x2a80 macro
H A Devergreend.h328 #define MC_SEQ_WR_CTL_D1_LP 0x2a80 macro
H A Dni_dpm.c2798 *out_reg = MC_SEQ_WR_CTL_D1_LP >> 2; in ni_check_s0_mc_reg_index()
2894 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in ni_initialize_mc_reg_table()
H A Dcypress_dpm.c1002 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_WR_CTL_D1_LP >> 2; in cypress_set_mc_reg_address_table()
H A Dsi_dpm.c5396 *out_reg = MC_SEQ_WR_CTL_D1_LP >> 2; in si_check_s0_mc_reg_index()
5496 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in si_initialize_mc_reg_table()
H A Dci_dpm.c4404 *out_reg = MC_SEQ_WR_CTL_D1_LP >> 2; in ci_check_s0_mc_reg_index()
4603 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in ci_initialize_mc_reg_table()
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c5977 *out_reg = MC_SEQ_WR_CTL_D1_LP; in si_check_s0_mc_reg_index()
6077 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in si_initialize_mc_reg_table()