Searched refs:IOP (Results 1 – 8 of 8) sorted by relevance
11 For RR44xx Intel IOP based adapters, the controller IOP is accessed via PCI BAR0 and BAR236 For Intel IOP based adapters, the controller IOP is accessed via PCI BAR0:54 For Marvell not Frey IOP based adapters, the IOP is accessed via PCI BAR0 and BAR1:78 For Marvell Frey IOP based adapters, the IOP is accessed via PCI BAR0 and BAR1:83 0x0 IOP configuration information.111 A request packet can be allocated in either IOP or host memory.119 relative to the IOP BAR0.125 - Post the packet to IOP by writing it to inbound queue. For requests126 allocated in IOP memory, write the offset to inbound queue port. For130 - The IOP process the request. When the request is completed, it[all …]
599 i. Support for 1078 type (ppc IOP) controller, device id : 0x60 added.
103 IOP, /* IO processor */ enumerator
353 pm8001_ha->memoryMap.region[IOP].num_elements = 1; in pm8001_alloc()354 pm8001_ha->memoryMap.region[IOP].element_size = PM8001_EVENT_LOG_SIZE; in pm8001_alloc()355 pm8001_ha->memoryMap.region[IOP].total_len = PM8001_EVENT_LOG_SIZE; in pm8001_alloc()356 pm8001_ha->memoryMap.region[IOP].alignment = 32; in pm8001_alloc()
220 pm8001_ha->memoryMap.region[IOP].phys_addr_hi; in init_default_table_values()222 pm8001_ha->memoryMap.region[IOP].phys_addr_lo; in init_default_table_values()
35 bool "Include IOP (IIfx/Quadra 9x0) ADB driver"38 The I/O Processor (IOP) is an Apple custom IC designed to provide
46 - Request MMIO/IOP resources62 - Release MMIO/IOP resources183 - Request MMIO/IOP resources236 Request MMIO/IOP resources
3686 D: XScale (IOP, IXP) porting and other random ARM bits