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Searched refs:DMUB_SR (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_dcn401.h15 DMUB_SR(DMCUB_CNTL) \
16 DMUB_SR(DMCUB_CNTL2) \
17 DMUB_SR(DMCUB_SEC_CNTL) \
18 DMUB_SR(DMCUB_INBOX0_SIZE) \
19 DMUB_SR(DMCUB_INBOX0_RPTR) \
20 DMUB_SR(DMCUB_INBOX0_WPTR) \
21 DMUB_SR(DMCUB_INBOX1_BASE_ADDRESS) \
22 DMUB_SR(DMCUB_INBOX1_SIZE) \
23 DMUB_SR(DMCUB_INBOX1_RPTR) \
24 DMUB_SR(DMCUB_INBOX1_WPTR) \
[all …]
H A Ddmub_dcn32.h36 DMUB_SR(DMCUB_CNTL) \
37 DMUB_SR(DMCUB_CNTL2) \
38 DMUB_SR(DMCUB_SEC_CNTL) \
39 DMUB_SR(DMCUB_INBOX0_SIZE) \
40 DMUB_SR(DMCUB_INBOX0_RPTR) \
41 DMUB_SR(DMCUB_INBOX0_WPTR) \
42 DMUB_SR(DMCUB_INBOX1_BASE_ADDRESS) \
43 DMUB_SR(DMCUB_INBOX1_SIZE) \
44 DMUB_SR(DMCUB_INBOX1_RPTR) \
45 DMUB_SR(DMCUB_INBOX1_WPTR) \
[all …]
H A Ddmub_dcn35.h36 DMUB_SR(DMCUB_CNTL) \
37 DMUB_SR(DMCUB_CNTL2) \
38 DMUB_SR(DMCUB_SEC_CNTL) \
39 DMUB_SR(DMCUB_INBOX0_SIZE) \
40 DMUB_SR(DMCUB_INBOX0_RPTR) \
41 DMUB_SR(DMCUB_INBOX0_WPTR) \
42 DMUB_SR(DMCUB_INBOX1_BASE_ADDRESS) \
43 DMUB_SR(DMCUB_INBOX1_SIZE) \
44 DMUB_SR(DMCUB_INBOX1_RPTR) \
45 DMUB_SR(DMCUB_INBOX1_WPTR) \
[all …]
H A Ddmub_dcn20.h36 DMUB_SR(DMCUB_CNTL) \
37 DMUB_SR(DMCUB_MEM_CNTL) \
38 DMUB_SR(DMCUB_SEC_CNTL) \
39 DMUB_SR(DMCUB_INBOX0_SIZE) \
40 DMUB_SR(DMCUB_INBOX0_RPTR) \
41 DMUB_SR(DMCUB_INBOX0_WPTR) \
42 DMUB_SR(DMCUB_INBOX1_BASE_ADDRESS) \
43 DMUB_SR(DMCUB_INBOX1_SIZE) \
44 DMUB_SR(DMCUB_INBOX1_RPTR) \
45 DMUB_SR(DMCUB_INBOX1_WPTR) \
[all …]
H A Ddmub_dcn31.h36 DMUB_SR(DMCUB_CNTL) \
37 DMUB_SR(DMCUB_CNTL2) \
38 DMUB_SR(DMCUB_SEC_CNTL) \
39 DMUB_SR(DMCUB_INBOX0_SIZE) \
40 DMUB_SR(DMCUB_INBOX0_RPTR) \
41 DMUB_SR(DMCUB_INBOX0_WPTR) \
42 DMUB_SR(DMCUB_INBOX1_BASE_ADDRESS) \
43 DMUB_SR(DMCUB_INBOX1_SIZE) \
44 DMUB_SR(DMCUB_INBOX1_RPTR) \
45 DMUB_SR(DMCUB_INBOX1_WPTR) \
[all …]
H A Ddmub_dcn301.c41 #define DMUB_SR(reg) REG_OFFSET(reg), macro
46 #undef DMUB_SR
H A Ddmub_dcn303.c42 #define DMUB_SR(reg) REG_OFFSET(reg), macro
47 #undef DMUB_SR
H A Ddmub_dcn21.c41 #define DMUB_SR(reg) REG_OFFSET(reg), macro
46 #undef DMUB_SR
H A Ddmub_dcn302.c41 #define DMUB_SR(reg) REG_OFFSET(reg), macro
46 #undef DMUB_SR
H A Ddmub_dcn316.c48 #define DMUB_SR(reg) REG_OFFSET_EXP(reg), macro
53 #undef DMUB_SR
H A Ddmub_dcn315.c48 #define DMUB_SR(reg) REG_OFFSET_EXP(reg), macro
53 #undef DMUB_SR
H A Ddmub_dcn314.c48 #define DMUB_SR(reg) REG_OFFSET_EXP(reg), macro
53 #undef DMUB_SR
H A Ddmub_dcn351.c21 #define DMUB_SR(reg) REG_STRUCT->offset.reg = REG_OFFSET_EXP(reg); in dmub_srv_dcn351_regs_init() macro
24 #undef DMUB_SR in dmub_srv_dcn351_regs_init()
H A Ddmub_dcn30.c42 #define DMUB_SR(reg) REG_OFFSET(reg), macro
47 #undef DMUB_SR
H A Ddmub_dcn20.c42 #define DMUB_SR(reg) REG_OFFSET(reg), macro
47 #undef DMUB_SR
H A Ddmub_dcn31.c40 #define DMUB_SR(reg) REG_OFFSET_EXP(reg), macro
45 #undef DMUB_SR
H A Ddmub_dcn32.c46 #define DMUB_SR(reg) REG_STRUCT->offset.reg = REG_OFFSET_EXP(reg); in dmub_srv_dcn32_regs_init() macro
49 #undef DMUB_SR in dmub_srv_dcn32_regs_init()
H A Ddmub_dcn401.c20 #define DMUB_SR(reg) REG_OFFSET_EXP(reg), macro
25 #undef DMUB_SR
H A Ddmub_dcn35.c44 #define DMUB_SR(reg) REG_STRUCT->offset.reg = REG_OFFSET_EXP(reg); in dmub_srv_dcn35_regs_init() macro
47 #undef DMUB_SR in dmub_srv_dcn35_regs_init()