17c008829SNicholas Kazlauskas /* 27c008829SNicholas Kazlauskas * Copyright 2019 Advanced Micro Devices, Inc. 37c008829SNicholas Kazlauskas * 47c008829SNicholas Kazlauskas * Permission is hereby granted, free of charge, to any person obtaining a 57c008829SNicholas Kazlauskas * copy of this software and associated documentation files (the "Software"), 67c008829SNicholas Kazlauskas * to deal in the Software without restriction, including without limitation 77c008829SNicholas Kazlauskas * the rights to use, copy, modify, merge, publish, distribute, sublicense, 87c008829SNicholas Kazlauskas * and/or sell copies of the Software, and to permit persons to whom the 97c008829SNicholas Kazlauskas * Software is furnished to do so, subject to the following conditions: 107c008829SNicholas Kazlauskas * 117c008829SNicholas Kazlauskas * The above copyright notice and this permission notice shall be included in 127c008829SNicholas Kazlauskas * all copies or substantial portions of the Software. 137c008829SNicholas Kazlauskas * 147c008829SNicholas Kazlauskas * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 157c008829SNicholas Kazlauskas * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 167c008829SNicholas Kazlauskas * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 177c008829SNicholas Kazlauskas * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 187c008829SNicholas Kazlauskas * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 197c008829SNicholas Kazlauskas * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 207c008829SNicholas Kazlauskas * OTHER DEALINGS IN THE SOFTWARE. 217c008829SNicholas Kazlauskas * 227c008829SNicholas Kazlauskas * Authors: AMD 237c008829SNicholas Kazlauskas * 247c008829SNicholas Kazlauskas */ 257c008829SNicholas Kazlauskas 26cdca3f21SAnthony Koo #include "../dmub_srv.h" 277c008829SNicholas Kazlauskas #include "dmub_reg.h" 2801c229d9SNicholas Kazlauskas #include "dmub_dcn21.h" 297c008829SNicholas Kazlauskas 307c008829SNicholas Kazlauskas #include "dcn/dcn_2_1_0_offset.h" 317c008829SNicholas Kazlauskas #include "dcn/dcn_2_1_0_sh_mask.h" 327c008829SNicholas Kazlauskas #include "renoir_ip_offset.h" 337c008829SNicholas Kazlauskas 347c008829SNicholas Kazlauskas #define BASE_INNER(seg) DMU_BASE__INST0_SEG##seg 357c008829SNicholas Kazlauskas #define CTX dmub 3601c229d9SNicholas Kazlauskas #define REGS dmub->regs 3701c229d9SNicholas Kazlauskas 3801c229d9SNicholas Kazlauskas /* Registers. */ 3901c229d9SNicholas Kazlauskas 4001c229d9SNicholas Kazlauskas const struct dmub_srv_common_regs dmub_srv_dcn21_regs = { 4101c229d9SNicholas Kazlauskas #define DMUB_SR(reg) REG_OFFSET(reg), 42*2631ac1aSAshley Thomas { 43*2631ac1aSAshley Thomas DMUB_COMMON_REGS() 44*2631ac1aSAshley Thomas DMCUB_INTERNAL_REGS() 45*2631ac1aSAshley Thomas }, 4601c229d9SNicholas Kazlauskas #undef DMUB_SR 4701c229d9SNicholas Kazlauskas 4801c229d9SNicholas Kazlauskas #define DMUB_SF(reg, field) FD_MASK(reg, field), 4901c229d9SNicholas Kazlauskas { DMUB_COMMON_FIELDS() }, 5001c229d9SNicholas Kazlauskas #undef DMUB_SF 5101c229d9SNicholas Kazlauskas 5201c229d9SNicholas Kazlauskas #define DMUB_SF(reg, field) FD_SHIFT(reg, field), 5301c229d9SNicholas Kazlauskas { DMUB_COMMON_FIELDS() }, 5401c229d9SNicholas Kazlauskas #undef DMUB_SF 5501c229d9SNicholas Kazlauskas }; 567c008829SNicholas Kazlauskas 57