| /linux/rust/kernel/ |
| H A D | dma.rs | 59 /// such as [`Coherent::zeroed`].
76 /// such as [`Coherent::zeroed`].
95 /// such as [`Coherent::zeroed`].
114 /// such as [`Coherent::zeroed`].
214 /// use kernel::dma::{attrs::*, Coherent};
218 /// let c: Coherent<[u64]> =
219 /// Coherent::zeroed_slice_with_attrs(dev, 4, GFP_KERNEL, attribs)?;
361 /// CPU-owned DMA allocation that can be converted into a device-shared [`Coherent`] object.
363 /// Unlike [`Coherent`], a [`CoherentBox`] is guaranteed to be fully owned by the CPU -- its DMA
368 /// convert it into a [`Coherent`] objec
560 impl<T: AsBytes + FromBytes + KnownSize + ?Sized> From<CoherentBox<T>> for Coherent<T> { global() implementation
595 pub struct Coherent<T: KnownSize + ?Sized> { global() struct
602 impl<T: KnownSize + ?Sized> Coherent<T> { global() implementation
705 impl<T: AsBytes + FromBytes> Coherent<T> { global() implementation
951 impl<T> Coherent<[T]> { global() implementation
964 impl<T: KnownSize + ?Sized> Drop for Coherent<T> { global() implementation
984 unsafe impl<T: KnownSize + Send + ?Sized> Send for Coherent<T> {} global() implementation
990 unsafe impl<T: KnownSize + ?Sized + AsBytes + FromBytes + Sync> Sync for Coherent<T> {} global() implementation
992 impl<T: KnownSize + AsBytes + ?Sized> debugfs::BinaryWriter for Coherent<T> { global() implementation
[all...] |
| H A D | uaccess.rs | 10 dma::Coherent,
530 alloc: &Coherent<T>, in write_dma()
|
| /linux/drivers/gpu/nova-core/ |
| H A D | gsp.rs | 10 Coherent,
83 struct LogBuffer(Coherent<[u8; LOG_BUFFER_SIZE]>);
88 let obj = Self(Coherent::zeroed(dev, GFP_KERNEL)?); in new()
121 pub(crate) libos: Coherent<[LibosMemoryRegionInitArgument]>,
129 rmargs: Coherent<GspArgumentsPadded>,
147 rmargs: Coherent::init(dev, GFP_KERNEL, GspArgumentsPadded::new(&cmdq))?, in new()
|
| /linux/samples/rust/ |
| H A D | rust_dma.rs | 10 Coherent,
24 ca: Coherent<[MyStruct]>,
76 let ca: Coherent<[MyStruct]> = in probe()
77 Coherent::zeroed_slice(pdev.as_ref(), TEST_VALUES.len(), GFP_KERNEL)?; in probe()
|
| /linux/drivers/gpu/nova-core/gsp/ |
| H A D | fw.rs | 13 dma::Coherent,
55 dma::Coherent,
65 pub(in crate::gsp) fn gsp_write_ptr(qs: &Coherent<GspMem>) -> u32 { in gsp_read_ptr()
69 pub(in crate::gsp) fn gsp_read_ptr(qs: &Coherent<GspMem>) -> u32 { in cpu_read_ptr()
73 pub(in crate::gsp) fn cpu_read_ptr(qs: &Coherent<GspMem>) -> u32 { in advance_cpu_read_ptr()
77 pub(in crate::gsp) fn advance_cpu_read_ptr(qs: &Coherent<GspMem>, count: u32) { in advance_cpu_read_ptr()
86 pub(in crate::gsp) fn cpu_write_ptr(qs: &Coherent<GspMem>) -> u32 { in advance_cpu_write_ptr()
90 pub(in crate::gsp) fn advance_cpu_write_ptr(qs: &Coherent<GspMem>, count: u32) { in advance_cpu_write_ptr()
664 obj: &'a Coherent<A>, in new()
|
| H A D | boot.rs | 7 dma::Coherent,
120 let wpr_meta = Coherent::init(dev, GFP_KERNEL, GspFwWprMeta::new(&gsp_fw, &fb_layout))?; in run_fwsec_frts()
|
| H A D | cmdq.rs | 10 Coherent,
216 /// Wrapper around [`GspMem`] to share it with the GPU using a [`Coherent`].
227 struct DmaGspMem(Coherent<GspMem>);
235 let gsp_mem = Coherent::<GspMem>::zeroed(dev, GFP_KERNEL)?; in new()
|
| /linux/Documentation/admin-guide/RAS/ |
| H A D | address-translation.rst | 21 * CCM = Cache Coherent Moderator
23 * COH_ST = Coherent Station
|
| /linux/drivers/misc/ocxl/ |
| H A D | Kconfig | 3 # Open Coherent Accelerator (OCXL) compatible devices
17 Coherent Accelerator Processor Interface (OpenCAPI) devices.
|
| /linux/drivers/gpu/drm/panfrost/ |
| H A D | TODO | 7 - Coherent DMA support
|
| /linux/Documentation/translations/zh_CN/userspace-api/accelerators/ |
| H A D | ocxl.rst | 14 *OpenCAPI: Open Coherent Accelerator Processor Interface*
|
| /linux/Documentation/admin-guide/perf/ |
| H A D | starfive_starlink_pmu.rst | 6 StarLink Coherent Network on Chip (CNoC) that connects multiple CPU
|
| H A D | thunderx2-pmu.rst | 7 Cavium Coherent Processor Interconnect (CCPI2).
|
| H A D | arm-ccn.rst | 2 ARM Cache Coherent Network
|
| H A D | arm-cmn.rst | 2 Arm Coherent Mesh Network PMU
|
| /linux/Documentation/arch/xtensa/ |
| H A D | atomctl.rst | 9 1. With and without an Coherent Cache Controller which
|
| /linux/Documentation/PCI/ |
| H A D | boot-interrupts.rst | 101 Coherent Interface Protocol Interrupt Control
140 6.6.41 cipintrc Coherent Interface Protocol Interrupt Control
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| /linux/Documentation/driver-api/cxl/platform/ |
| H A D | cdat.rst | 4 Coherent Device Attribute Table (CDAT)
|
| /linux/drivers/devfreq/ |
| H A D | Kconfig | 138 This adds a devfreq driver for MediaTek Cache Coherent Interconnect
|
| /linux/Documentation/driver-api/cxl/linux/ |
| H A D | cxl-driver.rst | 153 An `endpoint` contains `endpoint decoders` and the device's Coherent Device
|
| /linux/ |
| H A D | MAINTAINERS | 19682 OCXL (Open Coherent Accelerator Processor Interface OpenCAPI) DRIVER
|