Home
last modified time | relevance | path

Searched refs:CNTX_BUSY_INT_ENABLE (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dnid.h495 # define CNTX_BUSY_INT_ENABLE (1 << 19) macro
H A Dcikd.h1332 # define CNTX_BUSY_INT_ENABLE (1 << 19) macro
H A Devergreend.h1247 # define CNTX_BUSY_INT_ENABLE (1 << 19) macro
H A Dr600d.h715 # define CNTX_BUSY_INT_ENABLE (1 << 19) macro
H A Dr600.c3622 WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in r600_disable_interrupt_state()
3763 u32 cp_int_cntl = CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE; in r600_irq_set()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c2251 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, in gfx_v11_0_enable_gui_idle_interrupt()
5072 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CNTX_BUSY_INT_ENABLE, 0); in gfx_v11_0_soft_reset()
5182 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CNTX_BUSY_INT_ENABLE, 1); in gfx_v11_0_soft_reset()
5571 data = REG_SET_FIELD(data, CP_INT_CNTL, CNTX_BUSY_INT_ENABLE, 1); in gfx_v11_0_update_coarse_grain_clock_gating()
H A Dgfx_v12_1.c1507 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, in gfx_v12_1_xcc_enable_gui_idle_interrupt()
3124 data = REG_SET_FIELD(data, CP_INT_CNTL, CNTX_BUSY_INT_ENABLE, 1); in gfx_v12_1_xcc_update_coarse_grain_clock_gating()
H A Dgfx_v12_0.c1898 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, in gfx_v12_0_enable_gui_idle_interrupt()
4155 data = REG_SET_FIELD(data, CP_INT_CNTL, CNTX_BUSY_INT_ENABLE, 1); in gfx_v12_0_update_coarse_grain_clock_gating()
H A Dgfx_v9_0.c2763 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, enable ? 1 : 0); in gfx_v9_0_enable_gui_idle_interrupt()