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Searched refs:CLK_SET_RATE_GATE (Results 1 – 25 of 66) sorted by relevance

123

/linux/drivers/clk/at91/
H A Dsam9x7.c217 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
227 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
239 .f = CLK_SET_RATE_GATE,
248 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
260 .f = CLK_SET_RATE_GATE,
269 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
280 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
293 .f = CLK_SET_RATE_GATE,
302 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
319 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
[all …]
H A Dsama7d65.c249 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
262 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
278 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
288 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
299 .f = CLK_SET_RATE_GATE,
308 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
320 .f = CLK_SET_RATE_GATE,
329 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
342 .f = CLK_SET_RATE_GATE,
351 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
[all …]
H A Dsam9x60.c253 CLK_IS_CRITICAL | CLK_SET_RATE_GATE); in sam9x60_pmc_setup()
264 CLK_IS_CRITICAL | CLK_SET_RATE_GATE, 0); in sam9x60_pmc_setup()
273 &pll_frac_layout, CLK_SET_RATE_GATE); in sam9x60_pmc_setup()
280 CLK_SET_RATE_GATE | in sam9x60_pmc_setup()
300 CLK_SET_RATE_GATE, 0); in sam9x60_pmc_setup()
H A Dsama7g5.c207 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
220 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
236 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
246 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
257 .f = CLK_SET_RATE_GATE,
266 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
278 .f = CLK_SET_RATE_GATE, },
286 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
298 .f = CLK_SET_RATE_GATE,
307 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
[all …]
H A Dclk-audio-pll.c471 init.flags = CLK_SET_RATE_GATE; in at91_clk_register_audio_pll_frac()
501 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | in at91_clk_register_audio_pll_pad()
532 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | in at91_clk_register_audio_pll_pmc()
H A Dclk-h32mx.c111 init.flags = CLK_SET_RATE_GATE; in at91_clk_register_h32mx()
H A Dclk-plldiv.c102 init.flags = CLK_SET_RATE_GATE; in at91_clk_register_plldiv()
H A Dclk-smd.c129 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in at91sam9x5_clk_register_smd()
H A Dclk-usb.c240 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | in _at91sam9x5_clk_register_usb()
291 init.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT; in at91sam9n12_clk_register_usb()
H A Dat91sam9rl.c134 &sam9rl_mck_lock, CLK_SET_RATE_GATE, 0); in at91sam9rl_pmc_setup()
/linux/drivers/clk/qcom/
H A Dlcc-ipq806x.c138 .flags = CLK_SET_RATE_GATE,
255 .flags = CLK_SET_RATE_GATE,
339 .flags = CLK_SET_RATE_GATE,
H A Dlcc-msm8960.c121 .flags = CLK_SET_RATE_GATE, \
283 .flags = CLK_SET_RATE_GATE,
353 .flags = CLK_SET_RATE_GATE,
H A Dgcc-mdm9615.c792 .flags = CLK_SET_RATE_GATE,
843 .flags = CLK_SET_RATE_GATE,
1066 .flags = CLK_SET_RATE_GATE,
1117 .flags = CLK_SET_RATE_GATE,
1173 .flags = CLK_SET_RATE_GATE,
1229 .flags = CLK_SET_RATE_GATE,
1285 .flags = CLK_SET_RATE_GATE,
H A Dgcc-ipq806x.c1217 .flags = CLK_SET_RATE_GATE,
1268 .flags = CLK_SET_RATE_GATE,
1688 .flags = CLK_SET_RATE_GATE,
1782 .flags = CLK_SET_RATE_GATE,
1876 .flags = CLK_SET_RATE_GATE,
1975 .flags = CLK_SET_RATE_GATE,
2116 .flags = CLK_SET_RATE_GATE,
2190 .flags = CLK_SET_RATE_GATE,
2264 .flags = CLK_SET_RATE_GATE,
2330 .flags = CLK_SET_RATE_GATE,
/linux/drivers/clk/sunxi-ng/
H A Dccu-sun55i-a523.c56 CLK_SET_RATE_GATE |
76 CLK_SET_RATE_GATE),
131 CLK_SET_RATE_GATE),
175 CLK_SET_RATE_GATE),
189 CLK_SET_RATE_GATE),
211 CLK_SET_RATE_GATE),
233 CLK_SET_RATE_GATE),
256 CLK_SET_RATE_GATE),
270 CLK_SET_RATE_GATE),
310 CLK_SET_RATE_GATE),
[all …]
/linux/drivers/clk/meson/
H A Da9-peripherals.c479 static A9_COMP_GATE(dspa_0, DSPA_CLK_CTRL, 8, CLK_SET_RATE_GATE);
483 static A9_COMP_GATE(dspa_1, DSPA_CLK_CTRL, 24, CLK_SET_RATE_GATE);
928 static A9_COMP_GATE(mali_0, MALI_CLK_CTRL, 8, CLK_SET_RATE_GATE);
932 static A9_COMP_GATE(mali_1, MALI_CLK_CTRL, 24, CLK_SET_RATE_GATE);
954 static A9_COMP_GATE(mali_stack_0, MALI_STACK_CLK_CTRL, 8, CLK_SET_RATE_GATE);
958 static A9_COMP_GATE(mali_stack_1, MALI_STACK_CLK_CTRL, 24, CLK_SET_RATE_GATE);
991 static A9_COMP_GATE(hevcf_0, HEVCF_CLK_CTRL, 8, CLK_SET_RATE_GATE);
995 static A9_COMP_GATE(hevcf_1, HEVCF_CLK_CTRL, 24, CLK_SET_RATE_GATE);
1028 static A9_COMP_GATE(hcodec_0, HCODEC_CLK_CTRL, 8, CLK_SET_RATE_GATE);
1032 static A9_COMP_GATE(hcodec_1, HCODEC_CLK_CTRL, 24, CLK_SET_RATE_GATE);
[all …]
/linux/drivers/clk/imx/
H A Dclk-pfdv2.c227 init.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT; in imx_clk_hw_pfdv2()
229 init.flags = CLK_SET_RATE_GATE; in imx_clk_hw_pfdv2()
H A Dclk-imx7ulp.c76 … = imx_clk_hw_divider_flags("apll_pre_div", "apll_pre_sel", base + 0x508, 8, 3, CLK_SET_RATE_GATE); in imx7ulp_clk_scg1_init()
77 … = imx_clk_hw_divider_flags("spll_pre_div", "spll_pre_sel", base + 0x608, 8, 3, CLK_SET_RATE_GATE); in imx7ulp_clk_scg1_init()
101 …SPLL_BUS_CLK] = imx_clk_hw_divider_gate("spll_bus_clk", "spll_sel", CLK_SET_RATE_GATE, base + 0x60… in imx7ulp_clk_scg1_init()
H A Dclk-imx6sll.c175 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
177 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 15, 1, 0, &imx_ccm_lock); in imx6sll_clocks_init()
179 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
181 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
H A Dclk-gpr-mux.c98 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in imx_clk_gpr_mux()
H A Dclk-imx6ul.c232 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6ul_clocks_init()
234 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 15, 1, 0, &imx_ccm_lock); in imx6ul_clocks_init()
236 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6ul_clocks_init()
238 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock); in imx6ul_clocks_init()
H A Dclk-imx7d.c429 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 21, 2, 0, test_div_table, &imx_ccm_lock); in imx7d_clocks_init()
431 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xf0, 19, 2, 0, test_div_table, &imx_ccm_lock); in imx7d_clocks_init()
433 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xf0, 22, 2, 0, post_div_table, &imx_ccm_lock); in imx7d_clocks_init()
435 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x130, 19, 2, 0, test_div_table, &imx_ccm_lock); in imx7d_clocks_init()
437 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x130, 22, 2, 0, post_div_table, &imx_ccm_lock); in imx7d_clocks_init()
H A Dclk-composite-7ulp.c159 has_swrst ? &pcc_gate_ops : &clk_gate_ops, CLK_SET_RATE_GATE | in imx_ulp_clk_hw_composite()
/linux/drivers/phy/mediatek/
H A Dphy-mtk-mipi-dsi.c114 .flags = CLK_SET_RATE_GATE, in mtk_mipi_tx_probe()
/linux/drivers/clk/spacemit/
H A Dccu-k3.c57 MPMU_POSR, POSR_PLL1_LOCK, CLK_SET_RATE_GATE);
59 MPMU_POSR, POSR_PLL2_LOCK, CLK_SET_RATE_GATE);
61 MPMU_POSR, POSR_PLL3_LOCK, CLK_SET_RATE_GATE);
63 MPMU_POSR, POSR_PLL4_LOCK, CLK_SET_RATE_GATE);
65 MPMU_POSR, POSR_PLL5_LOCK, CLK_SET_RATE_GATE);
67 MPMU_POSR, POSR_PLL6_LOCK, CLK_SET_RATE_GATE);
69 MPMU_POSR, POSR_PLL7_LOCK, CLK_SET_RATE_GATE);
71 MPMU_POSR, POSR_PLL8_LOCK, CLK_SET_RATE_GATE);

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