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Searched refs:CLK_GATE_AXI_ETH0 (Results 1 – 3 of 3) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dsophgo,sg2044-clk.h143 #define CLK_GATE_AXI_ETH0 134 macro
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2044.dtsi328 clocks = <&clk CLK_GATE_AXI_ETH0>,
/linux/drivers/clk/sophgo/
H A Dclk-sg2044.c1448 static DEFINE_SG2044_GATE(CLK_GATE_AXI_ETH0, clk_gate_axi_eth0,