Home
last modified time | relevance | path

Searched refs:ASID (Results 1 – 15 of 15) sorted by relevance

/linux/arch/arm/mm/
H A Dtlb-v7.S41 asid r3, r3 @ mask ASID
50 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
79 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
H A Dtlb-v6.S43 asid r3, r3 @ mask ASID
H A DKconfig610 This indicates whether the CPU has the ASID register; used to
/linux/arch/arm/include/asm/
H A Dmmu.h27 #define ASID(mm) ((unsigned int)((mm)->context.id.counter & ~ASID_MASK)) macro
29 #define ASID(mm) (0) macro
H A Dtlbflush.h363 const int asid = ASID(mm); in __local_flush_tlb_mm()
381 const int asid = ASID(mm); in local_flush_tlb_mm()
405 tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", ASID(mm)); in __flush_tlb_mm()
418 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in __local_flush_tlb_page()
439 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in local_flush_tlb_page()
456 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in __flush_tlb_page()
/linux/arch/arm64/include/asm/
H A Dtlbflush.h311 asid = __TLBI_VADDR(0, ASID(mm)); in flush_tlb_mm()
324 addr = __TLBI_VADDR(uaddr, ASID(mm)); in __local_flush_tlb_page_nonotify_nosync()
351 addr = __TLBI_VADDR(uaddr, ASID(mm)); in __flush_tlb_page_nosync()
504 asid = ASID(mm); in __flush_tlb_range_nosync()
534 asid = ASID(vma->vm_mm); in local_flush_tlb_contpte()
/linux/arch/loongarch/include/asm/
H A Dhw_breakpoint.h54 #define LOONGARCH_CSR_NAME_ASID ASID
/linux/Documentation/ABI/testing/
H A Ddebugfs-driver-habanalabs216 Description: Displays the hop values and physical address for a given ASID
217 and virtual address. The user should write the ASID and VA into
219 e.g. to display info about VA 0x1000 for ASID 1 you need to do:
323 address mappings per ASID and all user mappings of HW blocks
/linux/arch/arm64/mm/
H A Dcontext.c352 unsigned long asid = ASID(mm); in cpu_do_switch_mm()
/linux/arch/arm/
H A DKconfig649 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
653 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
658 entries regardless of the ASID.
692 bool "ARM errata: possible faulty MMU translations following an ASID switch"
697 which starts prior to an ASID switch but completes afterwards. This
699 the new ASID. This workaround places two dsb instructions in the mm
700 switching code so that no page table walks can cross the ASID switch.
767 which sends an IPI to the CPUs that are running the same ASID
/linux/Documentation/translations/zh_TW/arch/loongarch/
H A Dintroduction.rst112 0x18 地址空間標識符 ASID
/linux/Documentation/translations/zh_CN/arch/loongarch/
H A Dintroduction.rst112 0x18 地址空间标识符 ASID
/linux/Documentation/arch/loongarch/
H A Dintroduction.rst115 0x18 Address Space Identifier ASID
/linux/tools/arch/x86/kcpuid/
H A Dcpuid.csv832 0x8000000a, 0, ebx, 31:0, svm_nasid , Number of address space identifiers (ASID)
839 0x8000000a, 0, edx, 6, flushbyasid , Flush by ASID + Extended VMCB TLB_Control
985 0x8000001f, 0, edx, 31:0, min_sev_asid_no_sev_es , Minimum ASID for SEV-enabled SEV-ES-disabled guest
/linux/Documentation/admin-guide/
H A Dkernel-parameters.txt3213 SEV-SNP ASID space is partitioned into separate SEV-ES
3214 and SEV-SNP ASID ranges, with the SEV-SNP range being
3220 adjusts the ASID ranges for SEV-ES and SEV-SNP guests.