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Searched refs:sysctrl (Results 1 – 25 of 50) sorted by relevance

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/freebsd/sys/contrib/device-tree/src/arm/renesas/
H A Dr9a06g032.dtsi10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
25 clocks = <&sysctrl R9A06G032_CLK_A7MP>;
32 clocks = <&sysctrl R9A06G032_CLK_A7MP>;
76 clocks = <&sysctrl R9A06G032_HCLK_RTC>, <&ext_rtc_clk>;
78 power-domains = <&sysctrl>;
86 clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>;
94 clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>;
98 sysctrl: system-controller@4000c000 { label
99 compatible = "renesas,r9a06g032-sysctrl";
125 clocks = <&sysctrl R9A06G032_HCLK_USBF>,
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dzte,sysctrl.txt1 ZTE sysctrl Registers
6 - compatible = "zte,sysctrl"
18 - compatible = "zte,zx296718-aon-sysctrl"
19 - compatible = "zte,zx296718-sysctrl"
22 aon_sysctrl: aon-sysctrl@116000 {
23 compatible = "zte,zx296718-aon-sysctrl", "syscon";
27 sysctrl: sysctrl@1463000 {
28 compatible = "zte,zx296718-sysctrl", "syscon";
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dzte,tdm.txt13 - zte,tdm-dma-sysctrl : Reference to the sysctrl controller controlling
15 phandle of sysctrl.
16 register offset in sysctrl for control dma.
17 mask of the register that be written to sysctrl.
29 zte,tdm-dma-sysctrl = <&sysctrl 0x10c 4>;
H A Dhisilicon,hi6210-i2s.txt18 - hisilicon,sysctrl-syscon: phandle to sysctrl syscon
36 hisilicon,sysctrl-syscon = <&sys_ctrl>;
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Drenesas,r9a06g032-sysctrl.txt6 - "renesas,r9a06g032-sysctrl"
23 sysctrl: system-controller@4000c000 {
24 compatible = "renesas,r9a06g032-sysctrl";
36 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
43 clocks = <&sysctrl R9A06G032_CLK_UART0>, <&sysctrl R9A06G032_HCLK_UART0>;
45 power-domains = <&sysctrl>;
H A Damlogic,gxbb-clkc.txt27 - compatible: "syscon", "simple-mfd, and "amlogic,meson-gx-hhi-sysctrl" or
28 "amlogic,meson-axg-hhi-sysctrl"
33 sysctrl: system-controller@0 {
34 compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";
H A Dhisi-crg.txt14 - "hisilicon,hi3516cv300-sysctrl"
17 - "hisilicon,hi3798cv200-sysctrl"
H A Dhi6220-clock.txt16 - "hisilicon,hi6220-sysctrl"
36 compatible = "hisilicon,hi6220-sysctrl", "syscon";
H A Damlogic,gxbb-aoclkc.txt38 - compatible: "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd"
44 compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd";
/freebsd/sys/contrib/device-tree/Bindings/power/
H A Damlogic,meson-gx-pwrc.txt23 - amlogic,hhi-sysctrl: phandle to the HHI sysctrl node
31 - compatible: "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd"
38 compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd";
44 amlogic,hhi-sysctrl = <&sysctrl>;
/freebsd/sys/contrib/device-tree/Bindings/watchdog/
H A Dzte,zx2967-wdt.txt15 - zte,wdt-reset-sysctrl : Directs how to reset system by the watchdog.
19 * phandle of aon-sysctrl.
21 * configure value that be written to aon-sysctrl.
31 zte,wdt-reset-sysctrl = <&aon_sysctrl 0xb0 1 0x115>;
/freebsd/sys/contrib/device-tree/Bindings/arm/hisilicon/
H A Dhi3519-sysctrl.txt7 - compatible: "hisilicon,hi3519-sysctrl".
11 sysctrl: system-controller@12010000 {
12 compatible = "hisilicon,hi3519-sysctrl", "syscon";
H A Dhisilicon.txt62 - compatible : "hisilicon,sysctrl"
66 - smp-offset : offset in sysctrl for notifying slave cpu booting
71 - resume-offset : offset in sysctrl for notifying cpu0 when resume
72 - reboot-offset : offset in sysctrl for system reboot
77 sysctrl: system-controller@fc802000 {
78 compatible = "hisilicon,sysctrl";
112 - compatible : "hisilicon,hi6220-sysctrl"
124 compatible = "hisilicon,hi6220-sysctrl", "syscon";
211 - compatible : "hisilicon,hip01-sysctrl"
222 sysctrl: system-controller@10000000 {
[all …]
/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Dhisilicon,hi6220-reset.txt12 - "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller.
21 compatible = "hisilicon,hi6220-sysctrl", "syscon";
/freebsd/sys/contrib/device-tree/src/arm/hisilicon/
H A Dhi3519.dtsi162 sysctrl: system-controller@12020000 { label
163 compatible = "hisilicon,hi3519-sysctrl", "syscon";
169 regmap = <&sysctrl>;
H A Dhip01.dtsi86 compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl";
H A Dhisi-x5hd2.dtsi393 sysctrl: system-controller@0 { label
394 compatible = "hisilicon,sysctrl", "syscon";
400 regmap = <&sysctrl>;
495 hisilicon,power-syscon = <&sysctrl>;
/freebsd/sys/contrib/device-tree/src/arm64/zte/
H A Dzx296718.dtsi305 aon_sysctrl: aon-sysctrl@116000 {
306 compatible = "zte,zx296718-aon-sysctrl", "syscon";
515 zte,vga-power-control = <&sysctrl 0x170 0xe0>;
534 zte,tvenc-power-control = <&sysctrl 0x170 0x10>;
551 sysctrl: sysctrl@1463000 { label
552 compatible = "zte,zx296718-sysctrl", "syscon";
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dab8500.txt61 ab8500-sysctrl : : : System Control
72 pwm|regulator|rtc|sysctrl|usb]";
258 ab8500-sysctrl {
259 compatible = "stericsson,ab8500-sysctrl";
/freebsd/sys/contrib/device-tree/src/arm64/hisilicon/
H A Dhi3798cv200.dtsi142 sysctrl: system-controller@8000000 { label
143 compatible = "hisilicon,hi3798cv200-sysctrl", "syscon";
260 clocks = <&sysctrl HISTB_UART0_CLK>, <&sysctrl HISTB_UART0_CLK>;
594 clocks = <&sysctrl HISTB_IR_CLK>;
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gx.dtsi454 compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
525 amlogic,ao-sysctrl = <&sysctrl_AO>;
562 sysctrl: system-controller@0 { label
563 compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
569 amlogic,ao-sysctrl = <&sysctrl_AO>;
/freebsd/sys/contrib/device-tree/Bindings/display/
H A Dzte,vou.txt102 zte,vga-power-control = <&sysctrl 0x170 0xe0>;
118 zte,tvenc-power-control = <&sysctrl 0x170 0x10>;
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-ab8505.dtsi213 ab8500-sysctrl {
214 compatible = "stericsson,ab8500-sysctrl";
H A Dste-ab8500.dtsi245 ab8500-sysctrl {
246 compatible = "stericsson,ab8500-sysctrl";
/freebsd/sys/dev/pccbb/
H A Dpccbb_pci.c409 uint32_t mux, sysctrl, reg; in cbb_chipinit() local
491 sysctrl = pci_read_config(sc->dev, CBBR_SYSCTRL, 4); in cbb_chipinit()
495 if ((sysctrl & CBBM_SYSCTRL_INTRTIE) == 0) in cbb_chipinit()

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