1*c66ec88fSEmmanuel Vadot* Renesas R9A06G032 SYSCTRL 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired Properties: 4*c66ec88fSEmmanuel Vadot 5*c66ec88fSEmmanuel Vadot - compatible: Must be: 6*c66ec88fSEmmanuel Vadot - "renesas,r9a06g032-sysctrl" 7*c66ec88fSEmmanuel Vadot - reg: Base address and length of the SYSCTRL IO block. 8*c66ec88fSEmmanuel Vadot - #clock-cells: Must be 1 9*c66ec88fSEmmanuel Vadot - clocks: References to the parent clocks: 10*c66ec88fSEmmanuel Vadot - external 40mhz crystal. 11*c66ec88fSEmmanuel Vadot - external (optional) 32.768khz 12*c66ec88fSEmmanuel Vadot - external (optional) jtag input 13*c66ec88fSEmmanuel Vadot - external (optional) RGMII_REFCLK 14*c66ec88fSEmmanuel Vadot - clock-names: Must be: 15*c66ec88fSEmmanuel Vadot clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext"; 16*c66ec88fSEmmanuel Vadot - #power-domain-cells: Must be 0 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel VadotExamples 19*c66ec88fSEmmanuel Vadot-------- 20*c66ec88fSEmmanuel Vadot 21*c66ec88fSEmmanuel Vadot - SYSCTRL node: 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel Vadot sysctrl: system-controller@4000c000 { 24*c66ec88fSEmmanuel Vadot compatible = "renesas,r9a06g032-sysctrl"; 25*c66ec88fSEmmanuel Vadot reg = <0x4000c000 0x1000>; 26*c66ec88fSEmmanuel Vadot #clock-cells = <1>; 27*c66ec88fSEmmanuel Vadot 28*c66ec88fSEmmanuel Vadot clocks = <&ext_mclk>, <&ext_rtc_clk>, 29*c66ec88fSEmmanuel Vadot <&ext_jtag_clk>, <&ext_rgmii_ref>; 30*c66ec88fSEmmanuel Vadot clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext"; 31*c66ec88fSEmmanuel Vadot #power-domain-cells = <0>; 32*c66ec88fSEmmanuel Vadot }; 33*c66ec88fSEmmanuel Vadot 34*c66ec88fSEmmanuel Vadot - Other nodes can use the clocks provided by SYSCTRL as in: 35*c66ec88fSEmmanuel Vadot 36*c66ec88fSEmmanuel Vadot #include <dt-bindings/clock/r9a06g032-sysctrl.h> 37*c66ec88fSEmmanuel Vadot uart0: serial@40060000 { 38*c66ec88fSEmmanuel Vadot compatible = "snps,dw-apb-uart"; 39*c66ec88fSEmmanuel Vadot reg = <0x40060000 0x400>; 40*c66ec88fSEmmanuel Vadot interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 41*c66ec88fSEmmanuel Vadot reg-shift = <2>; 42*c66ec88fSEmmanuel Vadot reg-io-width = <4>; 43*c66ec88fSEmmanuel Vadot clocks = <&sysctrl R9A06G032_CLK_UART0>, <&sysctrl R9A06G032_HCLK_UART0>; 44*c66ec88fSEmmanuel Vadot clock-names = "baudclk", "apb_pclk"; 45*c66ec88fSEmmanuel Vadot power-domains = <&sysctrl>; 46*c66ec88fSEmmanuel Vadot }; 47