1*c66ec88fSEmmanuel VadotZTE zx2967 Watchdog timer 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot 5*c66ec88fSEmmanuel Vadot- compatible : should be one of the following. 6*c66ec88fSEmmanuel Vadot * zte,zx296718-wdt 7*c66ec88fSEmmanuel Vadot- reg : Specifies base physical address and size of the registers. 8*c66ec88fSEmmanuel Vadot- clocks : Pairs of phandle and specifier referencing the controller's clocks. 9*c66ec88fSEmmanuel Vadot- resets : Reference to the reset controller controlling the watchdog 10*c66ec88fSEmmanuel Vadot controller. 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel VadotOptional properties: 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel Vadot- timeout-sec : Contains the watchdog timeout in seconds. 15*c66ec88fSEmmanuel Vadot- zte,wdt-reset-sysctrl : Directs how to reset system by the watchdog. 16*c66ec88fSEmmanuel Vadot if we don't want to restart system when watchdog been triggered, 17*c66ec88fSEmmanuel Vadot it's not required, vice versa. 18*c66ec88fSEmmanuel Vadot It should include following fields. 19*c66ec88fSEmmanuel Vadot * phandle of aon-sysctrl. 20*c66ec88fSEmmanuel Vadot * offset of register that be written, should be 0xb0. 21*c66ec88fSEmmanuel Vadot * configure value that be written to aon-sysctrl. 22*c66ec88fSEmmanuel Vadot * bit mask, corresponding bits will be affected. 23*c66ec88fSEmmanuel Vadot 24*c66ec88fSEmmanuel VadotExample: 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel Vadotwdt: watchdog@1465000 { 27*c66ec88fSEmmanuel Vadot compatible = "zte,zx296718-wdt"; 28*c66ec88fSEmmanuel Vadot reg = <0x1465000 0x1000>; 29*c66ec88fSEmmanuel Vadot clocks = <&topcrm WDT_WCLK>; 30*c66ec88fSEmmanuel Vadot resets = <&toprst 35>; 31*c66ec88fSEmmanuel Vadot zte,wdt-reset-sysctrl = <&aon_sysctrl 0xb0 1 0x115>; 32*c66ec88fSEmmanuel Vadot}; 33