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Searched refs:getOpcode (Results 1 – 25 of 1103) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DGenericMachineInstrs.h41 return isPreISelGenericOpcode(MI->getOpcode()); in classof()
90 switch (MI->getOpcode()) { in classof()
120 return MI->getOpcode() == TargetOpcode::G_INDEXED_LOAD; in classof()
128 return MI->getOpcode() == TargetOpcode::G_INDEXED_SEXTLOAD || in classof()
129 MI->getOpcode() == TargetOpcode::G_INDEXED_ZEXTLOAD; in classof()
137 switch (MI->getOpcode()) { in classof()
152 return MI->getOpcode() == TargetOpcode::G_INDEXED_ZEXTLOAD; in classof()
160 return MI->getOpcode() == TargetOpcode::G_INDEXED_SEXTLOAD; in classof()
180 return MI->getOpcode() == TargetOpcode::G_INDEXED_STORE; in classof()
196 switch (MI->getOpcode()) { in classof()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp24 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
39 switch (FirstMI->getOpcode()) { in isArithmeticBccPair()
73 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
74 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
75 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
76 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
83 switch (FirstMI->getOpcode()) { in isArithmeticCbzPair()
124 switch (SecondMI.getOpcode()) { in isAESPair()
128 return FirstMI == nullptr || FirstMI->getOpcode() == AArch64::AESErr; in isAESPair()
132 return FirstMI == nullptr || FirstMI->getOpcode() == AArch64::AESDrr; in isAESPair()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVMergeBaseOffset.cpp86 if (Hi.getOpcode() != RISCV::LUI && Hi.getOpcode() != RISCV::AUIPC && in INITIALIZE_PASS()
87 Hi.getOpcode() != RISCV::PseudoMovAddr) in INITIALIZE_PASS()
92 Hi.getOpcode() == RISCV::AUIPC ? RISCVII::MO_PCREL_HI : RISCVII::MO_HI; in INITIALIZE_PASS()
100 if (Hi.getOpcode() == RISCV::PseudoMovAddr) { in INITIALIZE_PASS()
110 if (Lo->getOpcode() != RISCV::ADDI) in INITIALIZE_PASS()
115 if (Hi.getOpcode() == RISCV::LUI || Hi.getOpcode() == RISCV::PseudoMovAddr) { in INITIALIZE_PASS()
121 assert(Hi.getOpcode() == RISCV::AUIPC); in INITIALIZE_PASS()
151 if (Hi.getOpcode() == RISCV::AUIPC && Hi.getOperand(1).isGlobal()) { in foldOffset()
161 if (Hi.getOpcode() != RISCV::AUIPC) in foldOffset()
197 assert((TailAdd.getOpcode() == RISCV::ADD) && "Expected ADD instruction!"); in foldLargeOffset()
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelDAGToDAG.cpp82 if (Addr.getOpcode() == ISD::FrameIndex) in INITIALIZE_PASS()
84 if (Addr.getOpcode() == ISD::TargetExternalSymbol || in INITIALIZE_PASS()
85 Addr.getOpcode() == ISD::TargetGlobalAddress || in INITIALIZE_PASS()
86 Addr.getOpcode() == ISD::TargetGlobalTLSAddress) in INITIALIZE_PASS()
146 if (Addr.getOpcode() == ISD::TargetExternalSymbol || in selectADDRzii()
147 Addr.getOpcode() == ISD::TargetGlobalAddress || in selectADDRzii()
148 Addr.getOpcode() == ISD::TargetGlobalTLSAddress) in selectADDRzii()
177 if (Addr.getOpcode() == ISD::TargetExternalSymbol || in selectADDRzi()
178 Addr.getOpcode() == ISD::TargetGlobalAddress || in selectADDRzi()
179 Addr.getOpcode() == ISD::TargetGlobalTLSAddress) in selectADDRzi()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600EmitClauseMarkers.cpp32 switch (MI.getOpcode()) { in OccupiedDwords()
46 if (TII->isLDSRetInstr(MI.getOpcode())) in OccupiedDwords()
49 if (TII->isVector(MI) || TII->isCubeOp(MI.getOpcode()) || in OccupiedDwords()
50 TII->isReductionOp(MI.getOpcode())) in OccupiedDwords()
65 if (TII->isALUInstr(MI.getOpcode())) in isALU()
67 if (TII->isVector(MI) || TII->isCubeOp(MI.getOpcode())) in isALU()
69 switch (MI.getOpcode()) { in isALU()
83 switch (MI.getOpcode()) { in IsTrivialInst()
113 if (!TII->isALUInstr(MI.getOpcode()) && MI.getOpcode() != R600::DOT_4) in SubstituteKCacheBank()
119 (TII->isALUInstr(MI.getOpcode()) || MI.getOpcode() == R600::DOT_4) && in SubstituteKCacheBank()
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H A DSIShrinkInstructions.cpp100 int Src0Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0); in foldImmediates()
262 int SOPKOpc = AMDGPU::getSOPKOp(MI.getOpcode()); in shrinkScalarCompare()
295 const AMDGPU::MIMGInfo *Info = AMDGPU::getMIMGInfo(MI.getOpcode()); in shrinkMIMG()
312 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in shrinkMIMG()
376 int TFEIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::tfe); in shrinkMIMG()
377 int LWEIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::lwe); in shrinkMIMG()
408 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vdata), in shrinkMIMG()
427 const unsigned Opcode = MI.getOpcode(); in shrinkMadFma()
538 unsigned Opc = MI.getOpcode(); in shrinkScalarLogicOp()
687 assert(MovT.getOpcode() == AMDGPU::V_MOV_B32_e32 || in matchSwap()
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H A DR600Packetizer.cpp67 if (!TII->isALUInstr(I->getOpcode()) && !I->isBundle()) in getPreviousVector()
81 int OperandIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::write); in getPreviousVector()
84 int DstIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::dst); in getPreviousVector()
93 if (BI->getOpcode() == R600::DOT4_r600 || in getPreviousVector()
94 BI->getOpcode() == R600::DOT4_eg) { in getPreviousVector()
128 int OperandIdx = TII->getOperandIdx(MI.getOpcode(), Op); in substitutePV()
163 if (!TII->isALUInstr(MI.getOpcode())) in isSoloInstruction()
165 if (MI.getOpcode() == R600::GROUP_BARRIER) in isSoloInstruction()
169 return TII->isLDSInstr(MI.getOpcode()); in isSoloInstruction()
179 int OpI = TII->getOperandIdx(MII->getOpcode(), R600::OpName::pred_sel), in isLegalToPacketizeTogether()
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H A DR600InstrInfo.cpp35 return get(MI.getOpcode()).TSFlags & R600_InstFlag::VECTOR; in isVector()
135 if (isALUInstr(MI.getOpcode())) in canBeConsideredALU()
137 if (isVector(MI) || isCubeOp(MI.getOpcode())) in canBeConsideredALU()
139 switch (MI.getOpcode()) { in canBeConsideredALU()
159 return isTransOnly(MI.getOpcode()); in isTransOnly()
167 return isVectorOnly(MI.getOpcode()); in isVectorOnly()
181 usesVertexCache(MI.getOpcode()); in usesVertexCache()
191 usesVertexCache(MI.getOpcode())) || in usesTextureCache()
192 usesTextureCache(MI.getOpcode()); in usesTextureCache()
214 if (!isALUInstr(MI.getOpcode())) { in readsLDSSrcReg()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelperCasts.cpp161 if (!isLegalOrBeforeLegalizer({Ext->getOpcode(), {DstTy, SrcTy}})) in matchTruncateOfExt()
165 B.buildInstr(Ext->getOpcode(), {Dst}, {Src}); in matchTruncateOfExt()
220 if (!isCastFree(Cast->getOpcode(), DstTy, SrcTy)) in matchCastOfSelect()
224 auto True = B.buildInstr(Cast->getOpcode(), {DstTy}, {TrueReg}); in matchCastOfSelect()
225 auto False = B.buildInstr(Cast->getOpcode(), {DstTy}, {FalseReg}); in matchCastOfSelect()
247 if (First->getOpcode() == Second->getOpcode() && in matchExtOfExt()
248 isLegalOrBeforeLegalizer({Second->getOpcode(), {DstTy, SrcTy}})) { in matchExtOfExt()
249 if (Second->getOpcode() == TargetOpcode::G_ZEXT) { in matchExtOfExt()
258 B.buildInstr(Second->getOpcode(), {Dst}, {Src}); in matchExtOfExt()
265 if (First->getOpcode() == TargetOpcode::G_ANYEXT && in matchExtOfExt()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h210 inline unsigned getOpcode() const;
692 unsigned getOpcode() const { return (unsigned)NodeType; }
741 bool isVPOpcode() const { return ISD::isVPOpcode(getOpcode()); }
982 if (TopologicalPrune && M->getOpcode() != ISD::TokenFactor && (NId > 0) &&
1256 inline unsigned SDValue::getOpcode() const {
1257 return Node->getOpcode();
1392 return N->getOpcode() == ISD::ADDRSPACECAST;
1511 switch (getOpcode()) {
1532 switch (N->getOpcode()) {
1595 assert(getOpcode() == ISD::ATOMIC_LOAD && "Only used for atomic loads.");
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVInstrInfo.cpp28 switch (MI.getOpcode()) { in isConstantInstr()
52 switch (MI.getOpcode()) { in isSpecConstantInstr()
66 switch (MI.getOpcode()) { in isInlineAsmDefInstr()
81 return MI.getOpcode() == SPIRV::OpTypeForwardPointer || in isTypeDeclInstr()
82 MI.getOpcode() == SPIRV::OpTypeStructContinuedINTEL; in isTypeDeclInstr()
87 switch (MI.getOpcode()) { in isDecorationInstr()
100 switch (MI.getOpcode()) { in isAliasingInstr()
111 switch (MI.getOpcode()) { in isHeaderInstr()
134 switch (MI.getOpcode()) { in canUseFastMathFlags()
153 switch (MI.getOpcode()) { in canUseNSW()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCBranchSelector.cpp138 if (TII->isPrefixed(MI.getOpcode())) { in ComputeBlockSizes()
325 if (I->getOpcode() == PPC::BCC && !I->getOperand(2).isImm()) in runOnMachineFunction()
327 else if ((I->getOpcode() == PPC::BC || I->getOpcode() == PPC::BCn) && in runOnMachineFunction()
330 else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ || in runOnMachineFunction()
331 I->getOpcode() == PPC::BDZ8 || I->getOpcode() == PPC::BDZ) && in runOnMachineFunction()
354 if (I->getOpcode() == PPC::BCC) { in runOnMachineFunction()
365 } else if (I->getOpcode() == PPC::BC) { in runOnMachineFunction()
368 } else if (I->getOpcode() == PPC::BCn) { in runOnMachineFunction()
371 } else if (I->getOpcode() == PPC::BDNZ) { in runOnMachineFunction()
373 } else if (I->getOpcode() == PPC::BDNZ8) { in runOnMachineFunction()
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H A DPPCTLSDynamicCall.cpp64 bool IsTLSTPRelMI = MI.getOpcode() == PPC::GETtlsTpointer32AIX; in processBlock()
65 bool IsTLSLDAIXMI = (MI.getOpcode() == PPC::TLSLDAIX8 || in processBlock()
66 MI.getOpcode() == PPC::TLSLDAIX); in processBlock()
68 if (MI.getOpcode() != PPC::ADDItlsgdLADDR && in processBlock()
69 MI.getOpcode() != PPC::ADDItlsldLADDR && in processBlock()
70 MI.getOpcode() != PPC::ADDItlsgdLADDR32 && in processBlock()
71 MI.getOpcode() != PPC::ADDItlsldLADDR32 && in processBlock()
72 MI.getOpcode() != PPC::TLSGDAIX && in processBlock()
73 MI.getOpcode() != PPC::TLSGDAIX8 && !IsTLSTPRelMI && !IsPCREL && in processBlock()
79 if (MI.getOpcode() == PPC::ADJCALLSTACKDOWN) in processBlock()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DMVETPAndVPTOptimisationsPass.cpp101 while (MI && MI->getOpcode() == TargetOpcode::COPY && in INITIALIZE_PASS_DEPENDENCY()
123 if (T.getOpcode() == ARM::t2LoopEnd && T.getOperand(1).getMBB() == Header) { in findLoopComponents()
127 if (T.getOpcode() == ARM::t2LoopEndDec && in findLoopComponents()
148 if (LoopEnd->getOpcode() == ARM::t2LoopEndDec) in findLoopComponents()
153 if (!LoopDec || LoopDec->getOpcode() != ARM::t2LoopDec) { in findLoopComponents()
162 if (!LoopPhi || LoopPhi->getOpcode() != TargetOpcode::PHI || in findLoopComponents()
175 if (!LoopStart || (LoopStart->getOpcode() != ARM::t2DoLoopStart && in findLoopComponents()
176 LoopStart->getOpcode() != ARM::t2WhileLoopSetup && in findLoopComponents()
177 LoopStart->getOpcode() != ARM::t2WhileLoopStartLR)) { in findLoopComponents()
188 assert(MI->getOpcode() == ARM::t2WhileLoopSetup && in RevertWhileLoopSetup()
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H A DARMLatencyMutations.cpp533 unsigned SrcOpcode = SrcMI->getOpcode(); in makeBundleAssumptions()
535 unsigned DstOpcode = DstMI->getOpcode(); in makeBundleAssumptions()
609 unsigned SrcOpcode = SrcMI->getOpcode(); in modifyBypasses()
635 unsigned DstOpcode = DstMI->getOpcode(); in modifyBypasses()
754 if (!II->producesSP(SrcMI->getOpcode()) && in modifyMixedWidthFP()
755 !II->producesDP(SrcMI->getOpcode()) && in modifyMixedWidthFP()
756 !II->producesQP(SrcMI->getOpcode())) in modifyMixedWidthFP()
760 if (II->producesSP(SrcMI->getOpcode()) && in modifyMixedWidthFP()
761 II->consumesDP(DstMI->getOpcode())) { in modifyMixedWidthFP()
766 } else if (II->producesSP(SrcMI->getOpcode()) && in modifyMixedWidthFP()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonNewValueJump.cpp128 if (II->getOpcode() == TargetOpcode::KILL) in INITIALIZE_PASS_DEPENDENCY()
212 if (MII->getOpcode() == TargetOpcode::KILL || in commonChecksToProhibitNewValueJump()
213 MII->getOpcode() == TargetOpcode::PHI || in commonChecksToProhibitNewValueJump()
214 MII->getOpcode() == TargetOpcode::COPY) in commonChecksToProhibitNewValueJump()
221 if (MII->getOpcode() == Hexagon::LDriw_pred || in commonChecksToProhibitNewValueJump()
222 MII->getOpcode() == Hexagon::STriw_pred) in commonChecksToProhibitNewValueJump()
249 switch (MI.getOpcode()) { in canCompareBeNewValueJump()
287 if (def->getOpcode() == TargetOpcode::COPY) in canCompareBeNewValueJump()
339 switch (MI->getOpcode()) { in getNewValueJumpOpcode()
421 switch (MI.getOpcode()) { in isNewValueJumpCandidate()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelDAGToDAG.cpp110 if (Addr.getOpcode() == ISD::OR && in INITIALIZE_PASS()
111 Addr.getOperand(1).getOpcode() == LanaiISD::SMALL) { in INITIALIZE_PASS()
160 if ((Addr.getOpcode() == ISD::TargetExternalSymbol || in selectAddrRiSpls()
161 Addr.getOpcode() == ISD::TargetGlobalAddress)) in selectAddrRiSpls()
165 ISD::NodeType AluOperator = static_cast<ISD::NodeType>(Addr.getOpcode()); in selectAddrRiSpls()
189 Addr.getOperand(1).getOpcode() == LanaiISD::SMALL) in selectAddrRiSpls()
242 if (Addr.getOpcode() == ISD::FrameIndex) in selectAddrRr()
246 if ((Addr.getOpcode() == ISD::TargetExternalSymbol || in selectAddrRr()
247 Addr.getOpcode() == ISD::TargetGlobalAddress)) in selectAddrRr()
251 ISD::NodeType AluOperator = static_cast<ISD::NodeType>(Addr.getOpcode()); in selectAddrRr()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelDAGToDAG.cpp85 if (Addr.getOpcode() == ARCISD::GAWRAPPER) { in SelectAddrModeImm()
95 if (Addr.getOpcode() == ARCISD::GAWRAPPER) { in SelectAddrModeS9()
99 if (Addr.getOpcode() != ISD::ADD && Addr.getOpcode() != ISD::SUB && in SelectAddrModeS9()
101 if (Addr.getOpcode() == ISD::FrameIndex) { in SelectAddrModeS9()
115 if (Addr.getOpcode() == ISD::SUB) in SelectAddrModeS9()
122 if (Base.getOpcode() == ISD::FrameIndex) { in SelectAddrModeS9()
139 if (Addr.getOpcode() == ARCISD::GAWRAPPER) { in SelectAddrModeFar()
144 if (Addr.getOpcode() == ISD::SUB) in SelectAddrModeFar()
162 if (Addr.getOpcode() == ISD::ADD) { in SelectFrameADDR_ri()
178 switch (N->getOpcode()) { in Select()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DDelaySlotFiller.cpp114 (MI->getOpcode() == SP::RESTORErr in runOnMachineBasicBlock()
115 || MI->getOpcode() == SP::RESTOREri)) { in runOnMachineBasicBlock()
123 (MI->getOpcode() == SP::FCMPS || MI->getOpcode() == SP::FCMPD in runOnMachineBasicBlock()
124 || MI->getOpcode() == SP::FCMPQ)) { in runOnMachineBasicBlock()
175 unsigned Opc = slot->getOpcode(); in findDelayInstr()
184 if (J->getOpcode() == SP::RESTORErr in findDelayInstr()
185 || J->getOpcode() == SP::RESTOREri) { in findDelayInstr()
269 unsigned Opcode = candidate->getOpcode(); in delayHasHazard()
309 switch(MI->getOpcode()) { in insertCallDefsUses()
348 if (MO.isImplicit() && MI->getOpcode() == SP::RETL) in insertDefsUses()
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H A DSparcISelDAGToDAG.cpp94 if (Addr.getOpcode() == ISD::TargetExternalSymbol || in SelectADDRri()
95 Addr.getOpcode() == ISD::TargetGlobalAddress || in SelectADDRri()
96 Addr.getOpcode() == ISD::TargetGlobalTLSAddress) in SelectADDRri()
99 if (Addr.getOpcode() == ISD::ADD) { in SelectADDRri()
115 if (Addr.getOperand(0).getOpcode() == SPISD::Lo) { in SelectADDRri()
120 if (Addr.getOperand(1).getOpcode() == SPISD::Lo) { in SelectADDRri()
132 if (Addr.getOpcode() == ISD::FrameIndex) return false; in SelectADDRrr()
133 if (Addr.getOpcode() == ISD::TargetExternalSymbol || in SelectADDRrr()
134 Addr.getOpcode() == ISD::TargetGlobalAddress || in SelectADDRrr()
135 Addr.getOpcode() == ISD::TargetGlobalTLSAddress) in SelectADDRrr()
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/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrAnalysis.h57 return Info->get(Inst.getOpcode()).isBranch(); in isBranch()
61 return Info->get(Inst.getOpcode()).isConditionalBranch(); in isConditionalBranch()
65 return Info->get(Inst.getOpcode()).isUnconditionalBranch(); in isUnconditionalBranch()
69 return Info->get(Inst.getOpcode()).isIndirectBranch(); in isIndirectBranch()
73 return Info->get(Inst.getOpcode()).isCall(); in isCall()
77 return Info->get(Inst.getOpcode()).isReturn(); in isReturn()
81 return Info->get(Inst.getOpcode()).isTerminator(); in isTerminator()
92 return Info->get(Inst.getOpcode()).hasDefOfPhysReg(Inst, PC, MCRI); in mayAffectControlFlow()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchMergeBaseOffset.cpp105 if (Hi20.getOpcode() != LoongArch::PCALAU12I) in INITIALIZE_PASS()
124 if (UseInst->getOpcode() != LoongArch::ADD_D) { in INITIALIZE_PASS()
126 if ((ST->is64Bit() && Lo12->getOpcode() != LoongArch::ADDI_D) || in INITIALIZE_PASS()
127 (!ST->is64Bit() && Lo12->getOpcode() != LoongArch::ADDI_W)) in INITIALIZE_PASS()
160 assert(Hi20.getOpcode() == LoongArch::PCALAU12I); in INITIALIZE_PASS()
197 if (Hi20.getOpcode() != LoongArch::LU12I_W) in detectFoldable()
214 if ((ST->is64Bit() && Add->getOpcode() != LoongArch::PseudoAddTPRel_D) || in detectFoldable()
215 (!ST->is64Bit() && Add->getOpcode() != LoongArch::PseudoAddTPRel_W)) in detectFoldable()
232 if ((ST->is64Bit() && Lo12->getOpcode() != LoongArch::ADDI_D) || in detectFoldable()
233 (!ST->is64Bit() && Lo12->getOpcode() != LoongArch::ADDI_W)) in detectFoldable()
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.cpp97 if (LastInst.getOpcode() == NVPTX::GOTO) { in analyzeBranch()
100 } else if (LastInst.getOpcode() == NVPTX::CBranch) { in analyzeBranch()
118 if (SecondLastInst.getOpcode() == NVPTX::CBranch && in analyzeBranch()
119 LastInst.getOpcode() == NVPTX::GOTO) { in analyzeBranch()
128 if (SecondLastInst.getOpcode() == NVPTX::GOTO && in analyzeBranch()
129 LastInst.getOpcode() == NVPTX::GOTO) { in analyzeBranch()
148 if (I->getOpcode() != NVPTX::GOTO && I->getOpcode() != NVPTX::CBranch) in removeBranch()
159 if (I->getOpcode() != NVPTX::CBranch) in removeBranch()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp85 int OpIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), Name); in insertNamedMCOperand()
394 unsigned Opc = Inst.getOpcode(); in decodeAVLdSt()
456 assert(MI.getOpcode() == 0); in tryDecodeInst()
524 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); in decodeImmOperands()
764 if (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::DPP) { in getInstruction()
768 if (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::VOP3P) in getInstruction()
770 else if (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::VOPC) in getInstruction()
772 else if (AMDGPU::isVOPC64DPP(MI.getOpcode())) in getInstruction()
774 else if (AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::dpp8) != in getInstruction()
777 else if (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::VOP3) in getInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyCFGStackify.cpp335 if (MI.getOpcode() == WebAssembly::LOOP) { in placeBlockMarker()
349 if (MI.getOpcode() == WebAssembly::BLOCK || in placeBlockMarker()
350 MI.getOpcode() == WebAssembly::TRY || in placeBlockMarker()
351 MI.getOpcode() == WebAssembly::TRY_TABLE) { in placeBlockMarker()
362 if (MI.getOpcode() == WebAssembly::END_BLOCK || in placeBlockMarker()
363 MI.getOpcode() == WebAssembly::END_LOOP || in placeBlockMarker()
364 MI.getOpcode() == WebAssembly::END_TRY || in placeBlockMarker()
365 MI.getOpcode() == WebAssembly::END_TRY_TABLE) in placeBlockMarker()
399 if (MI.getOpcode() == WebAssembly::LOOP) in placeBlockMarker()
412 if (MI.getOpcode() == WebAssembly::END_LOOP || in placeBlockMarker()
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