| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEFrameLowering.cpp | 151 .addImm(0) in emitPrologueInsns()
152 .addImm(0) in emitPrologueInsns()
156 .addImm(0) in emitPrologueInsns()
157 .addImm(8) in emitPrologueInsns()
163 .addImm(0) in emitPrologueInsns()
164 .addImm(24) in emitPrologueInsns()
168 .addImm(0) in emitPrologueInsns()
169 .addImm(32) in emitPrologueInsns()
175 .addImm(0) in emitPrologueInsns()
176 .addImm(40) in emitPrologueInsns()
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| H A D | VERegisterInfo.cpp | 209 build(VE::LEAzii, clobber).addImm(0).addImm(0).addImm(Lo_32(Offset)); in prepareReplaceFI()
210 build(VE::ANDrm, clobber).addReg(clobber).addImm(M0(32)); in prepareReplaceFI()
214 .addImm(Hi_32(Offset)); in prepareReplaceFI()
244 build(VE::STrii).addReg(FrameReg).addImm(0).addImm(0).addReg(SrcLoReg); in processSTQ()
265 build(VE::LDrii, DestLoReg).addReg(FrameReg).addImm(0).addImm(0); in processLDQ()
298 build(VE::SVMmr, TmpReg).addReg(SrcReg).addImm(i); in processSTVM()
300 build(VE::STrii).addReg(FrameReg).addImm(0).addImm(0).addReg( in processSTVM()
305 build(VE::SVMmr, TmpReg).addReg(SrcReg, getKillRegState(isKill)).addImm(3); in processSTVM()
337 build(VE::LDrii, TmpReg).addReg(FrameReg).addImm(0).addImm(0); in processLDVM()
348 build(VE::LVMir, DestReg).addImm(i).addReg(TmpReg, getKillRegState(true)); in processLDVM()
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| H A D | VEInstrInfo.cpp | 341 BuildMI(MBB, I, DL, MCID, SubDest).addReg(SubSrc).addImm(0); in copyPhysSubRegs()
366 .addImm(0); in copyPhysReg()
378 .addImm(0) in copyPhysReg()
379 .addImm(0) in copyPhysReg()
380 .addImm(256); in copyPhysReg()
382 .addImm(M1(0)) // Represent (0)1. in copyPhysReg()
479 .addImm(0) in storeRegToStackSlot()
480 .addImm(0) in storeRegToStackSlot()
486 .addImm(0) in storeRegToStackSlot()
487 .addImm(0) in storeRegToStackSlot()
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| H A D | VEInstrBuilder.h | 35 return MIB.addFrameIndex(FI).addImm(0).addImm(Offset);
36 return MIB.addFrameIndex(FI).addImm(Offset);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZAsmPrinter.cpp | 47 .addImm(MI->getOperand(1).getImm()); in lowerRILow()
52 .addImm(MI->getOperand(2).getImm()); in lowerRILow()
61 .addImm(MI->getOperand(1).getImm()); in lowerRIHigh()
66 .addImm(MI->getOperand(2).getImm()); in lowerRIHigh()
76 .addImm(MI->getOperand(3).getImm()) in lowerRIEfLow()
77 .addImm(MI->getOperand(4).getImm()) in lowerRIEfLow()
78 .addImm(MI->getOperand(5).getImm()); in lowerRIEfLow()
126 .addImm(MI->getOperand(2).getImm()) in lowerSubvectorLoad()
136 .addImm(MI->getOperand(2).getImm()) in lowerSubvectorStore()
138 .addImm(0); in lowerSubvectorStore()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 263 .addImm(PPC::sub_32); in selectZExt()
268 .addImm(0) in selectZExt()
269 .addImm(32); in selectZExt()
306 .addImm(Imm) in selectI64ImmDirect()
312 .addImm((Imm >> 16) & 0xffff) in selectI64ImmDirect()
327 .addImm((Imm >> 16) & 0xffff) in selectI64ImmDirect()
332 .addImm(Imm & 0xffff) in selectI64ImmDirect()
344 .addImm((Imm >> TZ) & 0xffff) in selectI64ImmDirect()
349 .addImm(TZ) in selectI64ImmDirect()
350 .addImm(LZ) in selectI64ImmDirect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ControlFlowFinalizer.cpp | 322 .addImm(0) // ADDR in MakeFetchClause()
323 .addImm(AluInstCount - 1); // COUNT in MakeFetchClause()
371 .addImm(LiteralPair0) in insertLiterals()
372 .addImm(LiteralPair1); in insertLiterals()
414 MILit.addImm(Literals[i]->getImm()); in MakeALUClause()
421 MILit.addImm(Literals[i + 1]->getImm()); in MakeALUClause()
427 MILit.addImm(0); in MakeALUClause()
441 BuildMI(BB, DL, TII->get(R600::FETCH_CLAUSE)).addImm(CfCount); in EmitFetchClause()
452 BuildMI(BB, DL, TII->get(R600::ALU_CLAUSE)).addImm(CfCount); in EmitALUClause()
521 .addImm(CfCount + 1) in runOnMachineFunction()
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| H A D | AMDGPUInstructionSelector.cpp | 156 .addImm(ConstVal->Value.getBoolValue() ? -1 : 0); in selectCOPY()
168 .addImm(NoMods) in selectCOPY()
169 .addImm(1) in selectCOPY()
170 .addImm(NoMods) in selectCOPY()
172 .addImm(NoMods); in selectCOPY()
174 .addImm(NoMods) in selectCOPY()
175 .addImm(0) in selectCOPY()
176 .addImm(NoMods) in selectCOPY()
178 .addImm(NoMods); in selectCOPY()
183 .addImm(1) in selectCOPY()
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| H A D | R600EmitClauseMarkers.cpp | 271 .addImm(Address++) // ADDR in MakeALUClause()
272 .addImm(KCacheBanks.empty()?0:KCacheBanks[0].first) // KB0 in MakeALUClause()
273 .addImm((KCacheBanks.size() < 2)?0:KCacheBanks[1].first) // KB1 in MakeALUClause()
274 .addImm(KCacheBanks.empty()?0:2) // KM0 in MakeALUClause()
275 .addImm((KCacheBanks.size() < 2)?0:2) // KM1 in MakeALUClause()
276 .addImm(KCacheBanks.empty()?0:KCacheBanks[0].second) // KLINE0 in MakeALUClause()
277 .addImm((KCacheBanks.size() < 2)?0:KCacheBanks[1].second) // KLINE1 in MakeALUClause()
278 .addImm(AluInstCount) // COUNT in MakeALUClause()
279 .addImm(1); // Enabled in MakeALUClause()
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| H A D | SIInstrInfo.cpp | 860 .addImm(1) in copyPhysReg()
861 .addImm(0); in copyPhysReg()
873 .addImm(0) in copyPhysReg()
893 .addImm(1) in copyPhysReg()
894 .addImm(0); in copyPhysReg()
906 .addImm(0) in copyPhysReg()
933 .addImm(0); in copyPhysReg()
938 .addImm(0); in copyPhysReg()
1013 .addImm(0) // src0_modifiers in copyPhysReg()
1015 .addImm(0); // op_sel in copyPhysReg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 187 .addImm(ARMCC::AL) in runOnMachineFunction()
1070 .addImm(ARMCC::AL) in emitJumpTableInsts()
1501 .addImm(MI->getOperand(2).getImm()) in emitInstruction()
1517 .addImm(MI->getOperand(2).getImm()) in emitInstruction()
1528 .addImm(ARMCC::AL) in emitInstruction()
1565 .addImm(ARMCC::AL).addReg(0) in emitInstruction()
1574 .addImm(ARMCC::AL) in emitInstruction()
1583 .addImm(ARMCC::AL) in emitInstruction()
1594 .addImm(ARMCC::AL) in emitInstruction()
1607 .addImm(ARMCC::AL) in emitInstruction()
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| H A D | MVETailPredUtils.h | 111 MIB.addImm(0);
112 MIB.addImm(ARMCC::AL);
119 MIB.addImm(0);
120 MIB.addImm(ARMCC::AL);
129 MIB.addImm(ARMCC::EQ); // condition code
154 MIB.addImm(ARMCC::AL);
176 MIB.addImm(0);
177 MIB.addImm(ARMCC::AL);
185 MIB.addImm(ARMCC::NE); // condition code
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrInfo.cpp | 239 .addImm(Val & 0xFFFF) in movImm()
243 .addImm((Val >> 16) & 0xFFFF) in movImm()
247 .addImm((Val >> 16) & 0xFFFF) in movImm()
251 .addImm(Val & 0xFFFF) in movImm()
259 .addImm(Val & 0xFF) in movImm()
263 .addImm((Val >> 8) & 0xFF) in movImm()
267 .addImm(8) in movImm()
272 .addImm(Val & 0xFF) in movImm()
276 .addImm((Val >> 16) & 0xFF) in movImm()
280 .addImm(8) in movImm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrBuilder.h | 121 return MIB.addReg(Reg).addImm(1).addReg(0).addImm(0).addReg(0); in addDirectMem()
138 return MIB.addImm(1).addReg(0).addImm(Offset).addReg(0); in addOffset()
143 return MIB.addImm(1).addReg(0).add(Offset).addReg(0); in addOffset()
162 .addImm(1) in addRegReg()
164 .addImm(0) in addRegReg()
180 MIB.addImm(AM.Scale).addReg(AM.IndexReg); in addFullAddress()
184 MIB.addImm(AM.Disp); in addFullAddress()
223 return MIB.addReg(GlobalBaseReg).addImm(1).addReg(0) in addConstantPoolReference()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.cpp | 81 .addImm(I * Alignment); in expandMEMCPY()
84 .addImm(I * Alignment); in expandMEMCPY()
94 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
96 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
101 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
103 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
108 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
110 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
140 .addImm(0); in storeRegToStackSlot()
145 .addImm(0); in storeRegToStackSlot()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiFrameLowering.cpp | 74 .addImm(MaxCallFrameSize); in replaceAdjDynAllocPseudo()
109 .addImm(-4) in emitPrologue()
110 .addImm(LPAC::makePreOp(LPAC::ADD)) in emitPrologue()
117 .addImm(8) in emitPrologue()
125 .addImm(StackSize) in emitPrologue()
180 .addImm(0); in emitEpilogue()
185 .addImm(-8) in emitEpilogue()
186 .addImm(LPAC::ADD); in emitEpilogue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCExpandPseudos.cpp | 70 .addImm(SI.getOperand(2).getImm()); in expandStore()
75 .addImm(0); in expandStore()
96 .addImm(32) in expandCTLZ()
97 .addImm(ARCCC::EQ) in expandCTLZ()
101 .addImm(31) in expandCTLZ()
102 .addImm(ARCCC::NE) in expandCTLZ()
124 .addImm(32) in expandCTTZ()
125 .addImm(ARCCC::EQ) in expandCTTZ()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64AsmPrinter.cpp | 457 EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::B).addImm(8)); in emitSled()
460 EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::HINT).addImm(0)); in emitSled()
543 EmitToStreamer(O, MCInstBuilder(AArch64::B).addImm(9)); in LowerPATCHABLE_EVENT_CALL()
549 .addImm(-4)); in LowerPATCHABLE_EVENT_CALL()
553 .addImm(2)); in LowerPATCHABLE_EVENT_CALL()
561 .addImm(2)); in LowerPATCHABLE_EVENT_CALL()
568 .addImm(4)); in LowerPATCHABLE_EVENT_CALL()
573 EmitToStreamer(O, MCInstBuilder(AArch64::B).addImm(6)); in LowerPATCHABLE_EVENT_CALL()
579 .addImm(-2)); in LowerPATCHABLE_EVENT_CALL()
589 .addImm(2)); in LowerPATCHABLE_EVENT_CALL()
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| H A D | AArch64SpeculationHardening.cpp | 216 BuildMI(MBB, MBBI, DL, TII->get(AArch64::DSB)).addImm(0xf); in insertFullSpeculationBarrier()
217 BuildMI(MBB, MBBI, DL, TII->get(AArch64::ISB)).addImm(0xf); in insertFullSpeculationBarrier()
230 .addImm(CondCode); in insertTrackingCode()
369 .addImm(0) in insertSPToRegTaintPropagation()
370 .addImm(0); // no shift in insertSPToRegTaintPropagation()
376 .addImm(AArch64CC::EQ); in insertSPToRegTaintPropagation()
392 .addImm(0) in insertRegToSPTaintPropagation()
393 .addImm(0); // no shift in insertRegToSPTaintPropagation()
399 .addImm(0); in insertRegToSPTaintPropagation()
404 .addImm(0) in insertRegToSPTaintPropagation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 813 .addImm(CRSaveOffset) in emitPrologue()
827 .addImm(FPOffset) in emitPrologue()
832 .addImm(PBPOffset) in emitPrologue()
837 .addImm(BPOffset) in emitPrologue()
848 .addImm(Offset) in emitPrologue()
866 .addImm(ImmOffset) in emitPrologue()
879 .addImm(CRSaveOffset) in emitPrologue()
928 .addImm(NegFrameSize); in emitPrologue()
943 .addImm(0) in emitPrologue()
944 .addImm(64 - Log2(MaxAlign)); in emitPrologue()
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| H A D | PPCBranchSelector.cpp | 364 .addImm(PPC::InvertPredicate(Pred)).addReg(CRReg).addImm(2); in runOnMachineFunction()
367 BuildMI(MBB, I, dl, TII->get(PPC::BCn)).addReg(CRBit).addImm(2); in runOnMachineFunction()
370 BuildMI(MBB, I, dl, TII->get(PPC::BC)).addReg(CRBit).addImm(2); in runOnMachineFunction()
372 BuildMI(MBB, I, dl, TII->get(PPC::BDZ)).addImm(2); in runOnMachineFunction()
374 BuildMI(MBB, I, dl, TII->get(PPC::BDZ8)).addImm(2); in runOnMachineFunction()
376 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ)).addImm(2); in runOnMachineFunction()
378 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ8)).addImm(2); in runOnMachineFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRExpandPseudoInsts.cpp | 259 .addImm(Lo8); in expandLogicImm()
273 .addImm(Hi8); in expandLogicImm()
332 MIBLO.addImm(Imm & 0xff); in expand()
333 MIBHI.addImm((Imm >> 8) & 0xff); in expand()
374 .addImm(Lo8); in expand()
383 .addImm(Hi8); in expand()
598 MIBLO.addImm(Imm & 0xff); in expand()
599 MIBHI.addImm((Imm >> 8) & 0xff); in expand()
641 MIBLO.addImm(Imm); in expand()
642 MIBHI.addImm(Imm + 1); in expand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVAsmPrinter.cpp | 195 .addImm(0)); in LowerPATCHPOINT()
247 .addImm(0)); in LowerSTATEPOINT()
539 .addImm(0)); in emitSled()
669 .addImm(0)); in LowerKCFI_CHECK()
685 .addImm(-(PrefixNops * NopSize + 4))); in LowerKCFI_CHECK()
695 MCInstBuilder(RISCV::LUI).addReg(ScratchRegs[1]).addImm(Hi20)); in LowerKCFI_CHECK()
704 .addImm(Lo12)); in LowerKCFI_CHECK()
765 MCInstBuilder(RISCV::SLLI).addReg(RISCV::X6).addReg(Reg).addImm(8), in EmitHwasanMemaccessSymbols()
771 .addImm(12), in EmitHwasanMemaccessSymbols()
782 MCInstBuilder(RISCV::LBU).addReg(RISCV::X6).addReg(RISCV::X6).addImm(0), in EmitHwasanMemaccessSymbols()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 649 .addImm(V); in emitConst64()
664 .addImm(LoOperand.getImm()); in emitCombineII()
669 .addImm(HiOperand.getImm()) in emitCombineII()
680 .addImm(LoOperand.getImm()); in emitCombineII()
685 .addImm(HiOperand.getImm()) in emitCombineII()
695 .addImm(LoOperand.getImm()); in emitCombineII()
700 .addImm(HiOperand.getImm()) in emitCombineII()
710 .addImm(LoOperand.getImm()); in emitCombineII()
715 .addImm(HiOperand.getImm()) in emitCombineII()
726 .addImm(HiOperand.getImm()) in emitCombineII()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PseudoProbeInserter.cpp | 65 .addImm(getFuncGUID(MF.getFunction().getParent(), DL)) in runOnMachineFunction()
66 .addImm( in runOnMachineFunction()
68 .addImm( in runOnMachineFunction()
70 .addImm(PseudoProbeDwarfDiscriminator::extractProbeAttributes( in runOnMachineFunction()
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