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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonDepArch.td12 def HasV5 : Predicate<"HST->hasV5Ops()">, AssemblerPredicate<(all_of ArchV5)>;
14 def HasV55 : Predicate<"HST->hasV55Ops()">, AssemblerPredicate<(all_of ArchV55)>;
16 def HasV60 : Predicate<"HST->hasV60Ops()">, AssemblerPredicate<(all_of ArchV60)>;
18 def HasV62 : Predicate<"HST->hasV62Ops()">, AssemblerPredicate<(all_of ArchV62)>;
20 def HasV65 : Predicate<"HST->hasV65Ops()">, AssemblerPredicate<(all_of ArchV65)>;
22 def HasV66 : Predicate<"HST->hasV66Ops()">, AssemblerPredicate<(all_of ArchV66)>;
24 def HasV67 : Predicate<"HST->hasV67Ops()">, AssemblerPredicate<(all_of ArchV67)>;
26 def HasV68 : Predicate<"HST->hasV68Ops()">, AssemblerPredicate<(all_of ArchV68)>;
28 def HasV69 : Predicate<"HST->hasV69Ops()">, AssemblerPredicate<(all_of ArchV69)>;
30 def HasV71 : Predicate<"HST->hasV71Ops()">, AssemblerPredicate<(all_of ArchV71)>;
[all …]
H A DHexagon.td115 def UseMEMOPS : Predicate<"HST->useMemops()">;
116 def UseHVX64B : Predicate<"HST->useHVX64BOps()">,
118 def UseHVX128B : Predicate<"HST->useHVX128BOps()">,
120 def UseHVX : Predicate<"HST->useHVXOps()">,
122 def UseHVXV60 : Predicate<"HST->useHVXV60Ops()">,
124 def UseHVXV62 : Predicate<"HST->useHVXV62Ops()">,
126 def UseHVXV65 : Predicate<"HST->useHVXV65Ops()">,
128 def UseHVXV66 : Predicate<"HST->useHVXV66Ops()">,
130 def UseHVXV67 : Predicate<"HST->useHVXV67Ops()">,
132 def UseHVXV68 : Predicate<"HST->useHVXV68Ops()">,
[all …]
H A DHexagonSplitConst32AndConst64.cpp62 auto &HST = Fn.getSubtarget<HexagonSubtarget>(); in runOnMachineFunction() local
65 if (HST.useSmallData() && TLOF.isSmallDataEnabled(HTM)) in runOnMachineFunction()
68 const TargetInstrInfo *TII = HST.getInstrInfo(); in runOnMachineFunction()
69 const TargetRegisterInfo *TRI = HST.getRegisterInfo(); in runOnMachineFunction()
H A DHexagonLoopAlign.cpp63 const HexagonSubtarget *HST = nullptr; member in __anon427cc72e0111::HexagonLoopAlign
123 if (HST->isTinyCore()) { in shouldBalignLoop()
178 HST = &MF.getSubtarget<HexagonSubtarget>(); in runOnMachineFunction()
179 HII = HST->getInstrInfo(); in runOnMachineFunction()
190 if (HST->useHVXOps()) { in runOnMachineFunction()
H A DHexagonISelDAGToDAG.h29 const HexagonSubtarget *HST; variable
38 : SelectionDAGISel(tm, OptLevel), HST(nullptr), HII(nullptr), in HexagonDAGToDAGISel()
43 HST = &MF.getSubtarget<HexagonSubtarget>(); in runOnMachineFunction()
44 HII = HST->getInstrInfo(); in runOnMachineFunction()
45 HRI = HST->getRegisterInfo(); in runOnMachineFunction()
H A DHexagonVExtract.cpp54 const HexagonSubtarget *HST = nullptr; member in __anoncdbfe6ba0111::HexagonVExtract
81 V &= (HST->getVectorLength()-1) & -4u; in genElemLoad()
102 HST = &MF.getSubtarget<HexagonSubtarget>(); in runOnMachineFunction()
103 HII = HST->getInstrInfo(); in runOnMachineFunction()
104 const auto &HRI = *HST->getRegisterInfo(); in runOnMachineFunction()
H A DHexagonVectorCombine.cpp79 HST(static_cast<const HexagonSubtarget &>(*TM_.getSubtargetImpl(F))) {} in HexagonVectorCombine()
176 const HexagonSubtarget &HST; member in __anoncba317990111::HexagonVectorCombine
645 return HVC.HST.isTypeForHVX(AI.ValTy); in isHvx()
716 bool HvxHasPredLoad = HVC.HST.useHVXV62Ops(); in createLoad()
757 assert(HVC.HST.isTypeForHVX(ValTy) && in createPredicatedLoad()
767 auto V6_vL32b_pred_ai = HVC.HST.getIntrinsicId(Hexagon::V6_vL32b_pred_ai); in createPredicatedLoad()
829 assert(HVC.HST.isTypeForHVX(Val->getType()) && in createPredicatedStore()
838 auto V6_vS32b_pred_ai = HVC.HST.getIntrinsicId(Hexagon::V6_vS32b_pred_ai); in createPredicatedStore()
917 G.second, [&](auto &I) { return HVC.HST.isTypeForHVX(I.ValTy); }); in createAddressGroups()
972 if (!HVC.HST.useHVXV62Ops()) in createLoadGroups()
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H A DHexagonTfrCleanup.cpp217 auto &HST = B.getParent()->getSubtarget<HexagonSubtarget>(); in rewriteIfImm() local
227 else if (HST.isTinyCore()) in rewriteIfImm()
288 auto &HST = MF.getSubtarget<HexagonSubtarget>(); in runOnMachineFunction() local
289 HII = HST.getInstrInfo(); in runOnMachineFunction()
290 TRI = HST.getRegisterInfo(); in runOnMachineFunction()
H A DHexagonBranchRelaxation.cpp95 auto &HST = MF.getSubtarget<HexagonSubtarget>(); in runOnMachineFunction() local
96 HII = HST.getInstrInfo(); in runOnMachineFunction()
97 HRI = HST.getRegisterInfo(); in runOnMachineFunction()
H A DHexagonRegisterInfo.cpp219 auto &HST = MF.getSubtarget<HexagonSubtarget>(); in eliminateFrameIndex() local
220 auto &HII = *HST.getInstrInfo(); in eliminateFrameIndex()
221 auto &HFI = *HST.getFrameLowering(); in eliminateFrameIndex()
270 unsigned HwLen = HST.getVectorLength(); in eliminateFrameIndex()
362 const HexagonSubtarget &HST = MF.getSubtarget<HexagonSubtarget>(); in shouldCoalesce() local
363 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) in shouldCoalesce()
H A DHexagonFrameLowering.cpp582 const auto &HST = MF.getSubtarget<HexagonSubtarget>(); in enableAllocFrameElim() local
584 !HST.getRegisterInfo()->hasStackRealignment(MF)); in enableAllocFrameElim()
587 !F.hasFnAttribute(Attribute::UWTable) && HST.noreturnStackElim() && in enableAllocFrameElim()
595 auto &HST = MF.getSubtarget<HexagonSubtarget>(); in insertPrologueInBlock() local
596 auto &HII = *HST.getInstrInfo(); in insertPrologueInBlock()
597 auto &HRI = *HST.getRegisterInfo(); in insertPrologueInBlock()
768 auto &HST = MF.getSubtarget<HexagonSubtarget>(); in insertEpilogueInBlock() local
769 auto &HII = *HST.getInstrInfo(); in insertEpilogueInBlock()
770 auto &HRI = *HST.getRegisterInfo(); in insertEpilogueInBlock()
890 auto &HST = MF.getSubtarget<HexagonSubtarget>(); in insertAllocframe() local
[all …]
H A DHexagonVLIWPacketizer.cpp211 auto &HST = MF.getSubtarget<HexagonSubtarget>(); in runOnMachineFunction() local
212 HII = HST.getInstrInfo(); in runOnMachineFunction()
213 HRI = HST.getRegisterInfo(); in runOnMachineFunction()
223 bool MinOnly = Minimal || DisablePacketizer || !HST.usePackets() || in runOnMachineFunction()
245 if (HST.isTinyCoreWithDuplex()) in runOnMachineFunction()
274 if (HST.isTinyCoreWithDuplex()) in runOnMachineFunction()
1844 auto &HST = MI.getParent()->getParent()->getSubtarget<HexagonSubtarget>(); in shouldAddToPacket() local
1852 if (HST.isTinyCoreWithDuplex() && CurrentPacketMIs.size() > 0 && in shouldAddToPacket()
H A DHexagonBlockRanges.cpp220 : MF(mf), HST(mf.getSubtarget<HexagonSubtarget>()), in HexagonBlockRanges()
221 TII(*HST.getInstrInfo()), TRI(*HST.getRegisterInfo()), in HexagonBlockRanges()
H A DHexagonISelDAGToDAG.cpp763 const HexagonFrameLowering *HFI = HST->getFrameLowering(); in SelectFrameIndex()
801 if (HST->isHVXVectorType(ResTy, true)) in SelectVAlign()
821 if (HST->useCompound()) { in SelectVAlign()
890 assert(HST->getVectorLength() * 8 == OpTy.getSizeInBits()); in SelectV2Q()
903 assert(HST->getVectorLength() * 8 == ResTy.getSizeInBits()); in SelectQ2V()
1010 if (HST->isHVXVectorType(N->getValueType(i), true)) in Select()
1014 if (HST->isHVXVectorType(I.getValueType(), true)) in Select()
1020 if (HST->useHVXOps() && isHvxOp(N)) { in Select()
1367 if (HST->useHVXOps()) in PreprocessISelDAG()
1417 auto &HST = MF->getSubtarget<HexagonSubtarget>(); in emitFunctionEntryCode() local
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H A DHexagonBlockRanges.h171 const HexagonSubtarget &HST; member
H A DHexagonOptAddrMode.cpp870 auto &HST = MF.getSubtarget<HexagonSubtarget>(); in runOnMachineFunction() local
872 HII = HST.getInstrInfo(); in runOnMachineFunction()
873 HRI = HST.getRegisterInfo(); in runOnMachineFunction()
H A DHexagonBitSimplify.cpp1468 auto &HST = MF->getSubtarget<HexagonSubtarget>(); in genTfrConst() local
1471 if (!HST.isTinyCore() || in genTfrConst()
2799 auto &HST = MF.getSubtarget<HexagonSubtarget>(); in runOnMachineFunction() local
2800 auto &HRI = *HST.getRegisterInfo(); in runOnMachineFunction()
2801 auto &HII = *HST.getInstrInfo(); in runOnMachineFunction()
3346 auto &HST = MF.getSubtarget<HexagonSubtarget>(); in runOnMachineFunction() local
3347 HII = HST.getInstrInfo(); in runOnMachineFunction()
3348 HRI = HST.getRegisterInfo(); in runOnMachineFunction()
H A DHexagonConstExtenders.cpp382 const HexagonSubtarget *HST = nullptr; member
1569 if (HST->useCompound()) { in insertInitializer()
1977 HST = &MF.getSubtarget<HexagonSubtarget>(); in runOnMachineFunction()
1978 HII = HST->getInstrInfo(); in runOnMachineFunction()
1979 HRI = HST->getRegisterInfo(); in runOnMachineFunction()
H A DHexagonHardwareLoops.cpp390 const HexagonSubtarget &HST = MF.getSubtarget<HexagonSubtarget>(); in runOnMachineFunction() local
391 TII = HST.getInstrInfo(); in runOnMachineFunction()
392 TRI = HST.getRegisterInfo(); in runOnMachineFunction()
H A DHexagonISelDAGToDAGHVX.cpp927 const HexagonSubtarget &HST; member
932 HST(getHexagonSubtarget(G)), HwLen(HST.getVectorLength()) {} in HvxSelector()
2683 unsigned S = CN->getZExtValue() % HST.getVectorLength(); in selectRor()
2738 unsigned HwLen = HST->getVectorLength(); in ppHvxShuffleOfShuffle()
H A DHexagonBitTracker.cpp115 const auto &HST = MF.getSubtarget<HexagonSubtarget>(); in getPhysRegBitWidth() local
116 if (HST.useHVXOps()) { in getPhysRegBitWidth()
/freebsd/contrib/llvm-project/clang/lib/AST/
H A DCommentParser.cpp600 HTMLStartTagComment *HST = in parseHTMLStartTag() local
641 S.actOnHTMLStartTagFinish(HST, S.copyArray(llvm::ArrayRef(Attrs)), in parseHTMLStartTag()
645 return HST; in parseHTMLStartTag()
648 S.actOnHTMLStartTagFinish(HST, S.copyArray(llvm::ArrayRef(Attrs)), in parseHTMLStartTag()
652 return HST; in parseHTMLStartTag()
666 S.actOnHTMLStartTagFinish(HST, S.copyArray(llvm::ArrayRef(Attrs)), in parseHTMLStartTag()
669 return HST; in parseHTMLStartTag()
673 S.actOnHTMLStartTagFinish(HST, S.copyArray(llvm::ArrayRef(Attrs)), in parseHTMLStartTag()
678 HST->getLocation(), in parseHTMLStartTag()
687 << HST->getSourceRange(); in parseHTMLStartTag()
[all …]
/freebsd/contrib/tzdata/
H A Dzonenow.tab37 # -10 - HST
38 XX +211825-1575130 Pacific/Honolulu Hawaii (HST)
43 # -10/-09 - HST / HDT (North America DST)
44 XX +515248-1763929 America/Adak western Aleutians in Alaska (HST/HDT)
H A Dbackward328 Link Pacific/Honolulu HST
H A Dbackzone1745 Zone Pacific/Johnston -10:00 - HST
1839 Zone HST -10:00 - HST

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