Searched hist:d37010a3c162f23e47a11a8f5946dbd974999c42 (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/clk/ |
| H A D | clk-plldig.c | d37010a3c162f23e47a11a8f5946dbd974999c42 Fri Dec 13 09:34:02 CET 2019 Wen He <wen.he_1@nxp.com> clk: ls1028a: Add clock driver for Display output interface
Add clock driver for QorIQ LS1028A Display output interfaces(LCD, DPHY),
as implemented in TSMC CLN28HPM PLL, this PLL supports the programmable
integer division and range of the display output pixel clock's 27-594MHz.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lkml.kernel.org/r/20191213083402.35678-2-wen.he_1@nxp.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| H A D | Makefile | diff d37010a3c162f23e47a11a8f5946dbd974999c42 Fri Dec 13 09:34:02 CET 2019 Wen He <wen.he_1@nxp.com> clk: ls1028a: Add clock driver for Display output interface
Add clock driver for QorIQ LS1028A Display output interfaces(LCD, DPHY),
as implemented in TSMC CLN28HPM PLL, this PLL supports the programmable
integer division and range of the display output pixel clock's 27-594MHz.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lkml.kernel.org/r/20191213083402.35678-2-wen.he_1@nxp.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| H A D | Kconfig | diff d37010a3c162f23e47a11a8f5946dbd974999c42 Fri Dec 13 09:34:02 CET 2019 Wen He <wen.he_1@nxp.com> clk: ls1028a: Add clock driver for Display output interface
Add clock driver for QorIQ LS1028A Display output interfaces(LCD, DPHY),
as implemented in TSMC CLN28HPM PLL, this PLL supports the programmable
integer division and range of the display output pixel clock's 27-594MHz.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lkml.kernel.org/r/20191213083402.35678-2-wen.he_1@nxp.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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