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/linux/drivers/clk/renesas/ |
H A D | clk-vbattb.c | 3b42450ce1771c7b11d8f3563f4bbfe9b8d26611 Fri Nov 01 10:57:14 CET 2024 Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> clk: renesas: vbattb: Add VBATTB clock driver
The VBATTB IP of the Renesas RZ/G3S SoC controls the clock that is used by the RTC. The input to the VBATTB could be a 32KHz crystal or an external clock device.
The HW block diagram for the clock generator is as follows:
+----------+ XC `\ RTXIN --->| |----->| \ +----+ VBATTCLK | 32K clock| | |----->|gate|-----------> | osc | XBYP | | +----+ RTXOUT --->| |----->| / +----------+ ,
After discussions w/ Stephen Boyd the clock tree associated with this hardware block was exported in Linux as:
vbattb-xtal xbyp xc mux vbattbclk
where: - input-xtal is the input clock (connected to RTXIN, RTXOUT pins) - xc, xbyp are mux inputs - mux is the internal mux - vbattclk is the gate clock that feeds in the end the RTC
to allow selecting the input of the MUX though assigned-clock DT properties, using the already existing clock drivers and avoid adding other DT properties. If the crystal is connected on RTXIN, RTXOUT pins the XC will be selected as mux input. If an external clock device is connected on RTXIN, RTXOUT pins the XBYP will be selected as mux input.
The load capacitance of the internal crystal can be configured with renesas,vbattb-load-nanofarads DT property.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241101095720.2247815-4-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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H A D | Makefile | diff 3b42450ce1771c7b11d8f3563f4bbfe9b8d26611 Fri Nov 01 10:57:14 CET 2024 Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> clk: renesas: vbattb: Add VBATTB clock driver
The VBATTB IP of the Renesas RZ/G3S SoC controls the clock that is used by the RTC. The input to the VBATTB could be a 32KHz crystal or an external clock device.
The HW block diagram for the clock generator is as follows:
+----------+ XC `\ RTXIN --->| |----->| \ +----+ VBATTCLK | 32K clock| | |----->|gate|-----------> | osc | XBYP | | +----+ RTXOUT --->| |----->| / +----------+ ,
After discussions w/ Stephen Boyd the clock tree associated with this hardware block was exported in Linux as:
vbattb-xtal xbyp xc mux vbattbclk
where: - input-xtal is the input clock (connected to RTXIN, RTXOUT pins) - xc, xbyp are mux inputs - mux is the internal mux - vbattclk is the gate clock that feeds in the end the RTC
to allow selecting the input of the MUX though assigned-clock DT properties, using the already existing clock drivers and avoid adding other DT properties. If the crystal is connected on RTXIN, RTXOUT pins the XC will be selected as mux input. If an external clock device is connected on RTXIN, RTXOUT pins the XBYP will be selected as mux input.
The load capacitance of the internal crystal can be configured with renesas,vbattb-load-nanofarads DT property.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241101095720.2247815-4-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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H A D | Kconfig | diff 3b42450ce1771c7b11d8f3563f4bbfe9b8d26611 Fri Nov 01 10:57:14 CET 2024 Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> clk: renesas: vbattb: Add VBATTB clock driver
The VBATTB IP of the Renesas RZ/G3S SoC controls the clock that is used by the RTC. The input to the VBATTB could be a 32KHz crystal or an external clock device.
The HW block diagram for the clock generator is as follows:
+----------+ XC `\ RTXIN --->| |----->| \ +----+ VBATTCLK | 32K clock| | |----->|gate|-----------> | osc | XBYP | | +----+ RTXOUT --->| |----->| / +----------+ ,
After discussions w/ Stephen Boyd the clock tree associated with this hardware block was exported in Linux as:
vbattb-xtal xbyp xc mux vbattbclk
where: - input-xtal is the input clock (connected to RTXIN, RTXOUT pins) - xc, xbyp are mux inputs - mux is the internal mux - vbattclk is the gate clock that feeds in the end the RTC
to allow selecting the input of the MUX though assigned-clock DT properties, using the already existing clock drivers and avoid adding other DT properties. If the crystal is connected on RTXIN, RTXOUT pins the XC will be selected as mux input. If an external clock device is connected on RTXIN, RTXOUT pins the XBYP will be selected as mux input.
The load capacitance of the internal crystal can be configured with renesas,vbattb-load-nanofarads DT property.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241101095720.2247815-4-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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