19e288cefSKuninori Morimoto# SPDX-License-Identifier: GPL-2.0 29e288cefSKuninori Morimoto 380978a4bSGeert Uytterhoevenconfig CLK_RENESAS 480978a4bSGeert Uytterhoeven bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS 580978a4bSGeert Uytterhoeven default y if ARCH_RENESAS 680978a4bSGeert Uytterhoeven select CLK_EMEV2 if ARCH_EMEV2 780978a4bSGeert Uytterhoeven select CLK_RZA1 if ARCH_R7S72100 8fde35c9cSChris Brandt select CLK_R7S9210 if ARCH_R7S9210 980978a4bSGeert Uytterhoeven select CLK_R8A73A4 if ARCH_R8A73A4 1080978a4bSGeert Uytterhoeven select CLK_R8A7740 if ARCH_R8A7740 11e8208a71SLad Prabhakar select CLK_R8A7742 if ARCH_R8A7742 12016f9663SBiju Das select CLK_R8A7743 if ARCH_R8A7743 || ARCH_R8A7744 1380978a4bSGeert Uytterhoeven select CLK_R8A7745 if ARCH_R8A7745 145bf2fbbeSBiju Das select CLK_R8A77470 if ARCH_R8A77470 15331a53e0SBiju Das select CLK_R8A774A1 if ARCH_R8A774A1 160b9f1c2cSBiju Das select CLK_R8A774B1 if ARCH_R8A774B1 17906e0a4aSFabrizio Castro select CLK_R8A774C0 if ARCH_R8A774C0 18c8a53fa1SMarian-Cristian Rotariu select CLK_R8A774E1 if ARCH_R8A774E1 1980978a4bSGeert Uytterhoeven select CLK_R8A7778 if ARCH_R8A7778 2080978a4bSGeert Uytterhoeven select CLK_R8A7779 if ARCH_R8A7779 2180978a4bSGeert Uytterhoeven select CLK_R8A7790 if ARCH_R8A7790 2280978a4bSGeert Uytterhoeven select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793 2380978a4bSGeert Uytterhoeven select CLK_R8A7792 if ARCH_R8A7792 2480978a4bSGeert Uytterhoeven select CLK_R8A7794 if ARCH_R8A7794 25b1dec4e7SWolfram Sang select CLK_R8A7795 if ARCH_R8A77951 2603975b72SGeert Uytterhoeven select CLK_R8A77960 if ARCH_R8A77960 272ba738d5SGeert Uytterhoeven select CLK_R8A77961 if ARCH_R8A77961 287ce36da9SJacopo Mondi select CLK_R8A77965 if ARCH_R8A77965 298d46e28fSSergei Shtylyov select CLK_R8A77970 if ARCH_R8A77970 30ce15783cSSergei Shtylyov select CLK_R8A77980 if ARCH_R8A77980 313570a2afSYoshihiro Shimoda select CLK_R8A77990 if ARCH_R8A77990 32d71e851dSGeert Uytterhoeven select CLK_R8A77995 if ARCH_R8A77995 3317bcc803SYoshihiro Shimoda select CLK_R8A779A0 if ARCH_R8A779A0 3424aaff6aSYoshihiro Shimoda select CLK_R8A779F0 if ARCH_R8A779F0 350ab55cf1SYoshihiro Shimoda select CLK_R8A779G0 if ARCH_R8A779G0 36f077cab3SCong Dang select CLK_R8A779H0 if ARCH_R8A779H0 374c3d8852SMichel Pollet select CLK_R9A06G032 if ARCH_R9A06G032 38c8b08822SBiju Das select CLK_R9A07G043 if ARCH_R9A07G043 3917f0ff3dSLad Prabhakar select CLK_R9A07G044 if ARCH_R9A07G044 40a1bcf50aSBiju Das select CLK_R9A07G054 if ARCH_R9A07G054 41de60a3ebSClaudiu Beznea select CLK_R9A08G045 if ARCH_R9A08G045 421dd65bb0SPhil Edworthy select CLK_R9A09G011 if ARCH_R9A09G011 43bb6a9aafSBiju Das select CLK_R9A09G047 if ARCH_R9A09G047 44*f6462eb0SLad Prabhakar select CLK_R9A09G056 if ARCH_R9A09G056 4536932cbcSLad Prabhakar select CLK_R9A09G057 if ARCH_R9A09G057 4680978a4bSGeert Uytterhoeven select CLK_SH73A0 if ARCH_SH73A0 4780978a4bSGeert Uytterhoeven 4880978a4bSGeert Uytterhoevenif CLK_RENESAS 4980978a4bSGeert Uytterhoeven 5080978a4bSGeert Uytterhoeven# SoC 5180978a4bSGeert Uytterhoevenconfig CLK_EMEV2 5280978a4bSGeert Uytterhoeven bool "Emma Mobile EV2 clock support" if COMPILE_TEST 5380978a4bSGeert Uytterhoeven 5480978a4bSGeert Uytterhoevenconfig CLK_RZA1 55371dd373SGeert Uytterhoeven bool "RZ/A1H clock support" if COMPILE_TEST 5680978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSTP 5780978a4bSGeert Uytterhoeven 58fde35c9cSChris Brandtconfig CLK_R7S9210 59fde35c9cSChris Brandt bool "RZ/A2 clock support" if COMPILE_TEST 60fde35c9cSChris Brandt select CLK_RENESAS_CPG_MSSR 61fde35c9cSChris Brandt 6280978a4bSGeert Uytterhoevenconfig CLK_R8A73A4 63371dd373SGeert Uytterhoeven bool "R-Mobile APE6 clock support" if COMPILE_TEST 6480978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSTP 6580978a4bSGeert Uytterhoeven select CLK_RENESAS_DIV6 6680978a4bSGeert Uytterhoeven 6780978a4bSGeert Uytterhoevenconfig CLK_R8A7740 68371dd373SGeert Uytterhoeven bool "R-Mobile A1 clock support" if COMPILE_TEST 6980978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSTP 7080978a4bSGeert Uytterhoeven select CLK_RENESAS_DIV6 7180978a4bSGeert Uytterhoeven 72e8208a71SLad Prabhakarconfig CLK_R8A7742 73e8208a71SLad Prabhakar bool "RZ/G1H clock support" if COMPILE_TEST 74e8208a71SLad Prabhakar select CLK_RCAR_GEN2_CPG 75e8208a71SLad Prabhakar 7680978a4bSGeert Uytterhoevenconfig CLK_R8A7743 77371dd373SGeert Uytterhoeven bool "RZ/G1M clock support" if COMPILE_TEST 7880978a4bSGeert Uytterhoeven select CLK_RCAR_GEN2_CPG 7980978a4bSGeert Uytterhoeven 8080978a4bSGeert Uytterhoevenconfig CLK_R8A7745 81371dd373SGeert Uytterhoeven bool "RZ/G1E clock support" if COMPILE_TEST 8280978a4bSGeert Uytterhoeven select CLK_RCAR_GEN2_CPG 8380978a4bSGeert Uytterhoeven 845bf2fbbeSBiju Dasconfig CLK_R8A77470 855bf2fbbeSBiju Das bool "RZ/G1C clock support" if COMPILE_TEST 865bf2fbbeSBiju Das select CLK_RCAR_GEN2_CPG 875bf2fbbeSBiju Das 88331a53e0SBiju Dasconfig CLK_R8A774A1 89331a53e0SBiju Das bool "RZ/G2M clock support" if COMPILE_TEST 90331a53e0SBiju Das select CLK_RCAR_GEN3_CPG 91331a53e0SBiju Das 920b9f1c2cSBiju Dasconfig CLK_R8A774B1 930b9f1c2cSBiju Das bool "RZ/G2N clock support" if COMPILE_TEST 940b9f1c2cSBiju Das select CLK_RCAR_GEN3_CPG 950b9f1c2cSBiju Das 96906e0a4aSFabrizio Castroconfig CLK_R8A774C0 97906e0a4aSFabrizio Castro bool "RZ/G2E clock support" if COMPILE_TEST 98906e0a4aSFabrizio Castro select CLK_RCAR_GEN3_CPG 99906e0a4aSFabrizio Castro 100c8a53fa1SMarian-Cristian Rotariuconfig CLK_R8A774E1 101c8a53fa1SMarian-Cristian Rotariu bool "RZ/G2H clock support" if COMPILE_TEST 102c8a53fa1SMarian-Cristian Rotariu select CLK_RCAR_GEN3_CPG 103c8a53fa1SMarian-Cristian Rotariu 10480978a4bSGeert Uytterhoevenconfig CLK_R8A7778 105371dd373SGeert Uytterhoeven bool "R-Car M1A clock support" if COMPILE_TEST 10680978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSTP 10780978a4bSGeert Uytterhoeven 10880978a4bSGeert Uytterhoevenconfig CLK_R8A7779 109371dd373SGeert Uytterhoeven bool "R-Car H1 clock support" if COMPILE_TEST 11080978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSTP 11180978a4bSGeert Uytterhoeven 11280978a4bSGeert Uytterhoevenconfig CLK_R8A7790 113371dd373SGeert Uytterhoeven bool "R-Car H2 clock support" if COMPILE_TEST 114d4e59f10SGeert Uytterhoeven select CLK_RCAR_GEN2_CPG 11580978a4bSGeert Uytterhoeven 11680978a4bSGeert Uytterhoevenconfig CLK_R8A7791 117371dd373SGeert Uytterhoeven bool "R-Car M2-W/N clock support" if COMPILE_TEST 1186449ab81SGeert Uytterhoeven select CLK_RCAR_GEN2_CPG 11980978a4bSGeert Uytterhoeven 12080978a4bSGeert Uytterhoevenconfig CLK_R8A7792 121371dd373SGeert Uytterhoeven bool "R-Car V2H clock support" if COMPILE_TEST 122fd3c2f38SGeert Uytterhoeven select CLK_RCAR_GEN2_CPG 12380978a4bSGeert Uytterhoeven 12480978a4bSGeert Uytterhoevenconfig CLK_R8A7794 125371dd373SGeert Uytterhoeven bool "R-Car E2 clock support" if COMPILE_TEST 1262d75588aSGeert Uytterhoeven select CLK_RCAR_GEN2_CPG 12780978a4bSGeert Uytterhoeven 12880978a4bSGeert Uytterhoevenconfig CLK_R8A7795 129371dd373SGeert Uytterhoeven bool "R-Car H3 clock support" if COMPILE_TEST 13080978a4bSGeert Uytterhoeven select CLK_RCAR_GEN3_CPG 13180978a4bSGeert Uytterhoeven 13292d1ebaeSGeert Uytterhoevenconfig CLK_R8A77960 133371dd373SGeert Uytterhoeven bool "R-Car M3-W clock support" if COMPILE_TEST 13480978a4bSGeert Uytterhoeven select CLK_RCAR_GEN3_CPG 13580978a4bSGeert Uytterhoeven 1362ba738d5SGeert Uytterhoevenconfig CLK_R8A77961 1372ba738d5SGeert Uytterhoeven bool "R-Car M3-W+ clock support" if COMPILE_TEST 1382ba738d5SGeert Uytterhoeven select CLK_RCAR_GEN3_CPG 1392ba738d5SGeert Uytterhoeven 1407ce36da9SJacopo Mondiconfig CLK_R8A77965 1417ce36da9SJacopo Mondi bool "R-Car M3-N clock support" if COMPILE_TEST 1427ce36da9SJacopo Mondi select CLK_RCAR_GEN3_CPG 1437ce36da9SJacopo Mondi 1448d46e28fSSergei Shtylyovconfig CLK_R8A77970 1458d46e28fSSergei Shtylyov bool "R-Car V3M clock support" if COMPILE_TEST 1468d46e28fSSergei Shtylyov select CLK_RCAR_GEN3_CPG 1478d46e28fSSergei Shtylyov 148ce15783cSSergei Shtylyovconfig CLK_R8A77980 149ce15783cSSergei Shtylyov bool "R-Car V3H clock support" if COMPILE_TEST 150ce15783cSSergei Shtylyov select CLK_RCAR_GEN3_CPG 151ce15783cSSergei Shtylyov 1523570a2afSYoshihiro Shimodaconfig CLK_R8A77990 1533570a2afSYoshihiro Shimoda bool "R-Car E3 clock support" if COMPILE_TEST 1543570a2afSYoshihiro Shimoda select CLK_RCAR_GEN3_CPG 1553570a2afSYoshihiro Shimoda 156d71e851dSGeert Uytterhoevenconfig CLK_R8A77995 157d71e851dSGeert Uytterhoeven bool "R-Car D3 clock support" if COMPILE_TEST 158d71e851dSGeert Uytterhoeven select CLK_RCAR_GEN3_CPG 159d71e851dSGeert Uytterhoeven 16017bcc803SYoshihiro Shimodaconfig CLK_R8A779A0 16117bcc803SYoshihiro Shimoda bool "R-Car V3U clock support" if COMPILE_TEST 162470e3f0dSYoshihiro Shimoda select CLK_RCAR_GEN4_CPG 16317bcc803SYoshihiro Shimoda 16424aaff6aSYoshihiro Shimodaconfig CLK_R8A779F0 16524aaff6aSYoshihiro Shimoda bool "R-Car S4-8 clock support" if COMPILE_TEST 16624aaff6aSYoshihiro Shimoda select CLK_RCAR_GEN4_CPG 16724aaff6aSYoshihiro Shimoda 1680ab55cf1SYoshihiro Shimodaconfig CLK_R8A779G0 1690ab55cf1SYoshihiro Shimoda bool "R-Car V4H clock support" if COMPILE_TEST 1700ab55cf1SYoshihiro Shimoda select CLK_RCAR_GEN4_CPG 1710ab55cf1SYoshihiro Shimoda 172f077cab3SCong Dangconfig CLK_R8A779H0 173f077cab3SCong Dang bool "R-Car V4M clock support" if COMPILE_TEST 174f077cab3SCong Dang select CLK_RCAR_GEN4_CPG 175f077cab3SCong Dang 1764c3d8852SMichel Polletconfig CLK_R9A06G032 177e8425dd5SGeert Uytterhoeven bool "RZ/N1D clock support" if COMPILE_TEST 1784c3d8852SMichel Pollet 179c8b08822SBiju Dasconfig CLK_R9A07G043 180c8b08822SBiju Das bool "RZ/G2UL clock support" if COMPILE_TEST 181c8b08822SBiju Das select CLK_RZG2L 182c8b08822SBiju Das 18317f0ff3dSLad Prabhakarconfig CLK_R9A07G044 18417f0ff3dSLad Prabhakar bool "RZ/G2L clock support" if COMPILE_TEST 18517f0ff3dSLad Prabhakar select CLK_RZG2L 18617f0ff3dSLad Prabhakar 187a1bcf50aSBiju Dasconfig CLK_R9A07G054 188a1bcf50aSBiju Das bool "RZ/V2L clock support" if COMPILE_TEST 189a1bcf50aSBiju Das select CLK_RZG2L 190a1bcf50aSBiju Das 191de60a3ebSClaudiu Bezneaconfig CLK_R9A08G045 192de60a3ebSClaudiu Beznea bool "RZ/G3S clock support" if COMPILE_TEST 193de60a3ebSClaudiu Beznea select CLK_RZG2L 194de60a3ebSClaudiu Beznea 1951dd65bb0SPhil Edworthyconfig CLK_R9A09G011 1961dd65bb0SPhil Edworthy bool "RZ/V2M clock support" if COMPILE_TEST 1971dd65bb0SPhil Edworthy select CLK_RZG2L 1981dd65bb0SPhil Edworthy 199bb6a9aafSBiju Dasconfig CLK_R9A09G047 200bb6a9aafSBiju Das bool "RZ/G3E clock support" if COMPILE_TEST 201bb6a9aafSBiju Das select CLK_RZV2H 202bb6a9aafSBiju Das 203*f6462eb0SLad Prabhakarconfig CLK_R9A09G056 204*f6462eb0SLad Prabhakar bool "RZ/V2N clock support" if COMPILE_TEST 205*f6462eb0SLad Prabhakar select CLK_RZV2H 206*f6462eb0SLad Prabhakar 20736932cbcSLad Prabhakarconfig CLK_R9A09G057 20836932cbcSLad Prabhakar bool "RZ/V2H(P) clock support" if COMPILE_TEST 20936932cbcSLad Prabhakar select CLK_RZV2H 21036932cbcSLad Prabhakar 21180978a4bSGeert Uytterhoevenconfig CLK_SH73A0 212371dd373SGeert Uytterhoeven bool "SH-Mobile AG5 clock support" if COMPILE_TEST 21380978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSTP 21480978a4bSGeert Uytterhoeven select CLK_RENESAS_DIV6 21580978a4bSGeert Uytterhoeven 21680978a4bSGeert Uytterhoeven 21780978a4bSGeert Uytterhoeven# Family 2188bb67d87SWolfram Sangconfig CLK_RCAR_CPG_LIB 2198bb67d87SWolfram Sang bool "CPG/MSSR library functions" if COMPILE_TEST 2208bb67d87SWolfram Sang 22180978a4bSGeert Uytterhoevenconfig CLK_RCAR_GEN2_CPG 222371dd373SGeert Uytterhoeven bool "R-Car Gen2 CPG clock support" if COMPILE_TEST 22380978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSSR 22480978a4bSGeert Uytterhoeven 22580978a4bSGeert Uytterhoevenconfig CLK_RCAR_GEN3_CPG 22615d683e6SLad Prabhakar bool "R-Car Gen3 and RZ/G2 CPG clock support" if COMPILE_TEST 2278bb67d87SWolfram Sang select CLK_RCAR_CPG_LIB 22880978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSSR 22980978a4bSGeert Uytterhoeven 230470e3f0dSYoshihiro Shimodaconfig CLK_RCAR_GEN4_CPG 231470e3f0dSYoshihiro Shimoda bool "R-Car Gen4 clock support" if COMPILE_TEST 232470e3f0dSYoshihiro Shimoda select CLK_RCAR_CPG_LIB 233470e3f0dSYoshihiro Shimoda select CLK_RENESAS_CPG_MSSR 234470e3f0dSYoshihiro Shimoda 235311accb6SYoshihiro Shimodaconfig CLK_RCAR_USB2_CLOCK_SEL 236ebae969dSGeert Uytterhoeven bool "R-Car USB2 clock selector support" 237311accb6SYoshihiro Shimoda depends on ARCH_RENESAS || COMPILE_TEST 2381ab4f439SYoshihiro Shimoda select RESET_CONTROLLER 239311accb6SYoshihiro Shimoda help 240311accb6SYoshihiro Shimoda This is a driver for R-Car USB2 clock selector 24180978a4bSGeert Uytterhoeven 242ef3c613cSLad Prabhakarconfig CLK_RZG2L 243ebae969dSGeert Uytterhoeven bool "RZ/{G2L,G2UL,G3S,V2L} family clock support" if COMPILE_TEST 244ef3c613cSLad Prabhakar select RESET_CONTROLLER 245ef3c613cSLad Prabhakar 246dd22e562SLad Prabhakarconfig CLK_RZV2H 247bb6a9aafSBiju Das bool "RZ/{G3E,V2H(P)} family clock support" if COMPILE_TEST 248dd22e562SLad Prabhakar select RESET_CONTROLLER 249dd22e562SLad Prabhakar 2503b42450cSClaudiu Bezneaconfig CLK_RENESAS_VBATTB 2513b42450cSClaudiu Beznea tristate "Renesas VBATTB clock controller" 2523b42450cSClaudiu Beznea depends on ARCH_RZG2L || COMPILE_TEST 2533b42450cSClaudiu Beznea select RESET_CONTROLLER 2543b42450cSClaudiu Beznea 25580978a4bSGeert Uytterhoeven# Generic 256a5bd7f7aSGeert Uytterhoevenconfig CLK_RENESAS_CPG_MSSR 257371dd373SGeert Uytterhoeven bool "CPG/MSSR clock support" if COMPILE_TEST 25880978a4bSGeert Uytterhoeven select CLK_RENESAS_DIV6 259a5bd7f7aSGeert Uytterhoeven 260a5bd7f7aSGeert Uytterhoevenconfig CLK_RENESAS_CPG_MSTP 261371dd373SGeert Uytterhoeven bool "MSTP clock support" if COMPILE_TEST 26280978a4bSGeert Uytterhoeven 26380978a4bSGeert Uytterhoevenconfig CLK_RENESAS_DIV6 26480978a4bSGeert Uytterhoeven bool "DIV6 clock support" if COMPILE_TEST 26580978a4bSGeert Uytterhoeven 26680978a4bSGeert Uytterhoevenendif # CLK_RENESAS 267