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/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,x1e80100-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,x1e80100-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm X1E80100 Display MDSS
10 - Abel Vesa <abel.vesa@linaro.org>
13 X1E80100 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,x1e80100-mdss
24 - description: Display AHB
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H A Dqcom,sm8650-dpu.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neil Armstrong <neil.armstrong@linaro.org>
12 $ref: /schemas/display/msm/dpu-common.yaml#
17 - qcom,sm8650-dpu
18 - qcom,x1e80100-dpu
22 - description: Address offset and size for mdp register set
23 - description: Address offset and size for vbif register set
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/linux/arch/arm64/boot/dts/qcom/
H A Dx1e80100-asus-vivobook-s15.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include "x1e80100.dtsi"
13 #include "x1e80100-pmics.dtsi"
17 compatible = "asus,vivobook-s15", "qcom,x1e80100";
18 chassis-type = "laptop";
20 pmic-glink {
21 compatible = "qcom,x1e80100-pmic-glink",
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H A Dx1e80100.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
8 #include <dt-bindings/clock/qcom,x1e80100-dispcc.h>
9 #include <dt-bindings/clock/qcom,x1e80100-gcc.h>
10 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h>
11 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,x1e80100-rpmh.h>
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H A Dx1e80100-qcp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include "x1e80100.dtsi"
12 #include "x1e80100-pmics.dtsi"
15 model = "Qualcomm Technologies, Inc. X1E80100 QCP";
16 compatible = "qcom,x1e80100-qcp", "qcom,x1e80100";
22 wcd938x: audio-codec {
23 compatible = "qcom,wcd9385-codec";
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H A Dx1e78100-lenovo-thinkpad-t14s.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 #include "x1e80100.dtsi"
15 #include "x1e80100-pmics.dtsi"
19 compatible = "lenovo,thinkpad-t14s", "qcom,x1e78100", "qcom,x1e80100";
20 chassis-type = "laptop";
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H A Dx1e80100-lenovo-yoga-slim7x.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include "x1e80100.dtsi"
12 #include "x1e80100-pmics.dtsi"
16 compatible = "lenovo,yoga-slim7x", "qcom,x1e80100";
18 pmic-glink {
19 compatible = "qcom,x1e80100-pmic-glink",
20 "qcom,sm8550-pmic-glink",
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H A Dx1e80100-microsoft-romulus.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10 #include "x1e80100.dtsi"
11 #include "x1e80100-pmics.dtsi"
24 compatible = "pwm-backlight";
26 enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
27 /* TODO: power-supply? */
29 pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>;
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H A Dx1e80100-crd.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "x1e80100.dtsi"
14 #include "x1e80100-pmics.dtsi"
17 model = "Qualcomm Technologies, Inc. X1E80100 CRD";
18 compatible = "qcom,x1e80100-crd", "qcom,x1e80100";
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/linux/drivers/gpu/drm/msm/
H A Dmsm_mdss.c2 * SPDX-License-Identifier: GPL-2.0
32 #define DEFAULT_REG_BW 153600 /* Used in mdss fbdev driver */
58 path0 = devm_of_icc_get(dev, "mdp0-mem"); in msm_mdss_parse_data_bus_icc_path()
62 msm_mdss->mdp_path[0] = path0; in msm_mdss_parse_data_bus_icc_path()
63 msm_mdss->num_mdp_paths = 1; in msm_mdss_parse_data_bus_icc_path()
65 path1 = devm_of_icc_get(dev, "mdp1-mem"); in msm_mdss_parse_data_bus_icc_path()
67 msm_mdss->mdp_path[1] = path1; in msm_mdss_parse_data_bus_icc_path()
68 msm_mdss->num_mdp_paths++; in msm_mdss_parse_data_bus_icc_path()
71 reg_bus_path = of_icc_get(dev, "cpu-cfg"); in msm_mdss_parse_data_bus_icc_path()
73 msm_mdss->reg_bus_path = reg_bus_path; in msm_mdss_parse_data_bus_icc_path()
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/linux/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-qcom.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/adreno-smmu-priv.h>
14 #include "arm-smmu.h"
15 #include "arm-smmu-qcom.h"
17 #define QCOM_DUMMY_VAL -1
32 for (spin_cnt = TLB_SPIN_COUNT; spin_cnt > 0; spin_cnt--) { in qcom_smmu_tlb_sync()
55 if (qsmmu->stall_enabled & BIT(idx)) in qcom_adreno_smmu_write_sctlr()
65 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; in qcom_adreno_smmu_get_fault_info()
66 struct arm_smmu_device *smmu = smmu_domain->smmu; in qcom_adreno_smmu_get_fault_info()
68 info->fsr = arm_smmu_cb_read(smmu, cfg->cbndx, ARM_SMMU_CB_FSR); in qcom_adreno_smmu_get_fault_info()
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/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_kms.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
13 #include <linux/dma-buf.h>
62 struct dpu_kms *kms = s->private; in _dpu_danger_signal_status()
65 if (!kms->hw_mdp) { in _dpu_danger_signal_status()
72 pm_runtime_get_sync(&kms->pdev->dev); in _dpu_danger_signal_status()
75 if (kms->hw_mdp->ops.get_danger_status) in _dpu_danger_signal_status()
76 kms->hw_mdp->ops.get_danger_status(kms->hw_mdp, in _dpu_danger_signal_status()
80 if (kms->hw_mdp->ops.get_safe_status) in _dpu_danger_signal_status()
81 kms->hw_mdp->ops.get_safe_status(kms->hw_mdp, in _dpu_danger_signal_status()
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