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/linux/Documentation/fb/
H A Dviafb.modes10 # 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock)
21 # Active Time 25.422 us 15.253 ms
28 mode "640x480-60"
31 timings 39722 48 16 33 10 96 2 endmode mode "480x640-60"
35 # 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock)
46 # Active Time 20.317 us 12.800 ms
52 mode "640x480-75"
56 # 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock)
67 # Active Time 17.778 us 11.093 ms
73 mode "640x480-85"
[all …]
H A Dpxafb.rst10 modprobe pxafb options=vmem:2M,mode:640x480-8,passive
14 video=pxafb:vmem:2M,mode:640x480-8,passive
21 mode:XRESxYRES[-BPP]
45 vsynclen:VSYNC == LCCR2_VSW + 1
53 active | passive => LCCR0_PAS
55 Active (TFT) or Passive (STN) display
65 hsync:HSYNC, vsync:VSYNC
67 Horizontal and vertical sync. 0 => active low, 1 => active
68 high.
76 Output Enable Polarity. 0 => active low, 1 => active high
[all …]
/linux/Documentation/devicetree/bindings/regulator/
H A Drichtek,rtmv20-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
16 There're still four pins for camera control, two inputs (strobe and vsync),
18 supply, vsync input from IR camera, and fsin1/fsin2 output for the optional.
27 wakeup-source: true
32 enable-gpios:
36 richtek,ld-pulse-delay-us:
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/linux/include/media/i2c/
H A Dtvp7002.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
6 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
19 * struct tvp7002_config - Platform dependent data
21 * 0 - Data clocked out on rising edge of DATACLK signal
22 * 1 - Data clocked out on falling edge of DATACLK signal
24 * 0 - Active low HSYNC output, 1 - Active high HSYNC output
25 *@vs_polarity: VSYNC Polarity
26 * 0 - Active low VSYNC output, 1 - Active high VSYNC output
27 *@fid_polarity: Active-high Field ID polarity.
[all …]
/linux/Documentation/devicetree/bindings/media/i2c/
H A Dov7670.txt8 - compatible: should be "ovti,ov7670"
9 - clocks: reference to the xclk input clock.
10 - clock-names: should be "xclk".
13 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
14 - vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.
17 - reset-gpios: reference to the GPIO connected to the resetb pin, if any.
18 Active is low.
19 - powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any.
20 Active is high.
21 - ov7670,pclk-hb-disable: a boolean property to suppress pixel clock output
[all …]
H A Dtvp7002.txt7 - compatible : Must be "ti,tvp7002"
10 - hsync-active: HSYNC Polarity configuration for the bus. Default value when
13 - vsync-active: VSYNC Polarity configuration for the bus. Default value when
16 - pclk-sample: Clock polarity of the bus. Default value when this property is
19 - sync-on-green-active: Active state of Sync-on-green signal property of the
21 0 = Normal Operation (Active Low, Default)
24 - field-even-active: Active-high Field ID output polarity control of the bus.
27 0 = Normal Operation (Active Low, Default)
31 video-interfaces.txt.
44 hsync-active = <1>;
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H A Dgalaxycore,gc0308.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
18 - $ref: /schemas/media/video-interface-devices.yaml#
23 - const: galaxycore,gc0308
24 - items:
25 - const: galaxycore,gc0309
26 - const: galaxycore,gc0308
35 reset-gpios:
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H A Dtvp514x.txt3 The TVP5146/TVP5146m2/TVP5147/TVP5147m1 device is high quality, single-chip
5 video formats into digital video component. The tvp514x decoder supports analog-
6 to-digital (A/D) conversion of component RGB and YPbPr signals as well as A/D
7 conversion and decoding of NTSC, PAL and SECAM composite and S-video into
11 - compatible : value should be either one among the following
17 - hsync-active: HSYNC Polarity configuration for endpoint.
19 - vsync-active: VSYNC Polarity configuration for endpoint.
21 - pclk-sample: Clock polarity of the endpoint.
24 media/video-interfaces.txt.
37 hsync-active = <1>;
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H A Dtda1997x.txt1 Device-Tree bindings for the NXP TDA1997x HDMI receiver
6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
[all …]
H A Dovti,ov772x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo@jmondi.org>
20 - ovti,ov7720
21 - ovti,ov7725
29 reset-gpios:
31 Reference to the GPIO connected to the RSTB pin which is active low.
34 powerdown-gpios:
36 Reference to the GPIO connected to the PWDN pin which is active high.
[all …]
/linux/Documentation/admin-guide/media/
H A Dmgb4.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ---------------
13 There are two types of parameters - global / PCI card related, found under
23 | 0 - No module present
24 | 1 - FPDL3
25 | 2 - GMSL
33 | 1 - FPDL3
34 | 2 - GMSL
42 PRODUCT-REVISION-SERIES-SERIAL
55 | 0 - single
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx53-tx53-x03x.dts2 * Copyright 2013-2017 Lothar Waßmann <LW@KARO-electronics.de>
4 * This file is dual-licensed: you can use it either under the terms
42 /dts-v1/;
43 #include "imx53-tx53.dtsi"
44 #include <dt-bindings/input/input.h>
45 #include <dt-bindings/interrupt-controller/irq.h>
46 #include <dt-bindings/pwm/pwm.h>
49 model = "Ka-Ro electronics TX53 module (LCD)";
57 compatible = "fsl,imx-parallel-display";
58 interface-pix-fmt = "rgb24";
[all …]
H A Dimx6ul-tx6ul.dtsi2 * Copyright 2015 Lothar Waßmann <LW@KARO-electronics.de>
4 * This file is dual-licensed: you can use it either under the terms
42 #include <dt-bindings/gpio/gpio.h>
43 #include <dt-bindings/interrupt-controller/irq.h>
44 #include <dt-bindings/pwm/pwm.h>
56 lcdif-23bit-pins-a = &pinctrl_disp0_1;
57 lcdif-24bit-pins-a = &pinctrl_disp0_2;
59 reg-can-xcvr = &reg_can_xcvr;
70 stdout-path = &uart1;
75 reg = <0x80000000 0>; /* will be filled by U-Boot */
[all …]
H A Dimx53-tx53-x13x.dts2 * Copyright 2013-2017 Lothar Waßmann <LW@KARO-electronics.de>
4 * This file is dual-licensed: you can use it either under the terms
44 * http://www.opensource.org/licenses/gpl-license.html
48 /dts-v1/;
49 #include "imx53-tx53.dtsi"
50 #include <dt-bindings/input/input.h>
53 model = "Ka-Ro electronics TX53 module (LVDS)";
63 compatible = "pwm-backlight";
65 power-supply = <&reg_3v3>;
66 brightness-levels = <
[all …]
/linux/Documentation/devicetree/bindings/media/
H A Dallwinner,sun4i-a10-csi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
13 description: |-
20 - const: allwinner,sun4i-a10-csi1
21 - const: allwinner,sun7i-a20-csi0
22 - items:
[all …]
H A Dvideo-interfaces.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
29 #address-cells = <1>;
30 #size-cells = <0>;
45 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
49 specify #address-cells, #size-cells properties independently for the 'port'
[all …]
H A Dmarvell,mmp2-ccic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/marvell,mmp2-ccic.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Lubomir Rintel <lkundrak@v3.sk>
15 pattern: '^camera@[a-f0-9]+$'
18 const: marvell,mmp2-ccic
26 power-domains:
30 $ref: /schemas/graph.yaml#/$defs/port-base
35 $ref: video-interfaces.yaml#
[all …]
H A Datmel-isi.txt2 ----------------------------------
5 - compatible: must be "atmel,at91sam9g45-isi" or "microchip,sam9x60-isi".
6 - reg: physical base address and length of the registers set for the device.
7 - interrupts: should contain IRQ line for the ISI.
8 - clocks: list of clock specifiers, corresponding to entries in the clock-names
9 property; please refer to clock-bindings.txt.
10 - clock-names: required elements: "isi_clk".
11 - pinctrl-names, pinctrl-0: please refer to pinctrl-bindings.txt.
15 defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
18 ------------------------
[all …]
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-tx28.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
4 * Copyright 2013-2017 Lothar Waßmann <LW@KARO-electronics.de>
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 model = "Ka-Ro electronics TX28 module";
34 reg = <0x40000000 0>; /* will be filled in by U-Boot */
38 compatible = "w1-gpio";
43 reg_usb0_vbus: regulator-usb0-vbus {
44 compatible = "regulator-fixed";
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-veyron-edp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 backlight_regulator: backlight-regulator {
10 compatible = "regulator-fixed";
11 enable-active-high;
13 pinctrl-names = "default";
14 pinctrl-0 = <&bl_pwr_en>;
15 regulator-name = "backlight_regulator";
16 vin-supply = <&vcc33_sys>;
17 startup-delay-us = <15000>;
20 panel_regulator: panel-regulator {
[all …]
/linux/arch/sh/include/asm/
H A Dsh7760fb.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sh7760fb.h -- platform data for SH7760/SH7763 LCDC framebuffer driver.
5 * (c) 2006-2008 MSC Vertriebsges.m.b.H.,
19 /* The LCDC dma engine always sets bits 27-26 to 1: this is Area3 */
78 /* VSYNC polarity inversion */
81 /* DISPLAY-ENABLE polarity inversion */
90 /* Disable output of HSYNC during VSYNC period */
93 /* Disable output of VSYNC during VSYNC period */
145 * HSYNC/VSYNC polarities are derived from the fb_var_screeninfo
148 * Display Enable signal (default high-active) DISPEN_LOWACT
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-sbc-t335.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * am335x-sbc-t335.dts - Device Tree file for Compulab SBC-T335
5 * Copyright (C) 2014 - 2015 CompuLab Ltd. - https://www.compulab.co.il/
8 #include "am335x-cm-t335.dts"
11 model = "CompuLab CM-T335 on SB-T335";
12 compatible = "compulab,sbc-t335", "compulab,cm-t335", "ti,am33xx";
18 pinctrl-names = "default", "sleep";
19 pinctrl-0 = <&lcd_pins_default>;
20 pinctrl-1 = <&lcd_pins_sleep>;
22 panel-info {
[all …]
H A Dcompulab-sb-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 CompuLab, Ltd. - https://www.compulab.co.il/
7 model = "CompuLab SB-SOM";
8 compatible = "compulab,sb-som";
10 vsb_3v3: fixedregulator-v3_3 {
11 compatible = "regulator-fixed";
12 regulator-name = "vsb_3v3";
13 regulator-min-microvolt = <3300000>;
14 regulator-max-microvolt = <3300000>;
15 regulator-always-on;
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-s3-pinecube.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
6 /dts-v1/;
7 #include "sun8i-v3.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "pine64,pinecube", "sochip,s3", "allwinner,sun8i-v3";
20 stdout-path = "serial0:115200n8";
24 compatible = "gpio-leds";
38 compatible = "regulator-fixed";
39 regulator-name = "vcc5v0";
[all …]
/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-timing.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-timing.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Sam Ravnborg <sam@ravnborg.org>
20 +-------+----------+-------------------------------------+----------+
24 +-------+----------+-------------------------------------+----------+
28 +-------+----------#######################################----------+
33 |<----->|<-------->#<-------+--------------------------->#<-------->|
[all …]

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