| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn401/ |
| H A D | dcn401_dpp.c | 293 int line_size = scl_data->viewport.width < scl_data->recout.width ? in dscl401_calc_lb_num_partitions()
294 scl_data->viewport.width : scl_data->recout.width; in dscl401_calc_lb_num_partitions()
317 if (scl_data->viewport.width == scl_data->h_active && in dscl401_calc_lb_num_partitions()
318 scl_data->viewport.height == scl_data->v_active) { in dscl401_calc_lb_num_partitions()
331 if (scl_data->viewport.width == scl_data->h_active && in dscl401_calc_lb_num_partitions()
332 scl_data->viewport.height == scl_data->v_active) { in dscl401_calc_lb_num_partitions()
368 int line_size = scl_data->viewport.width < scl_data->recout.width ? in dscl401_spl_calc_lb_num_partitions()
369 scl_data->viewport.width : scl_data->recout.width; in dscl401_spl_calc_lb_num_partitions()
392 if (scl_data->viewport.width == scl_data->h_active && in dscl401_spl_calc_lb_num_partitions()
393 scl_data->viewport.height == scl_data->v_active) { in dscl401_spl_calc_lb_num_partitions()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/ |
| H A D | dml21_translation_helper.c | 413 plane->composition.viewport.plane0.width = width; in populate_dml21_dummy_plane_cfg()
414 plane->composition.viewport.plane0.height = height; in populate_dml21_dummy_plane_cfg()
415 plane->composition.viewport.plane1.width = 0; in populate_dml21_dummy_plane_cfg()
416 plane->composition.viewport.plane1.height = 0; in populate_dml21_dummy_plane_cfg()
418 plane->composition.viewport.stationary = false; in populate_dml21_dummy_plane_cfg()
419 plane->composition.viewport.plane0.x_start = 0; in populate_dml21_dummy_plane_cfg()
420 plane->composition.viewport.plane0.y_start = 0; in populate_dml21_dummy_plane_cfg()
421 plane->composition.viewport.plane1.x_start = 0; in populate_dml21_dummy_plane_cfg()
422 plane->composition.viewport.plane1.y_start = 0; in populate_dml21_dummy_plane_cfg()
549 plane->composition.viewport.plane0.height = scaler_data->viewport.height; in populate_dml21_plane_config_from_plane_state()
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | samsung,exynos-pcie.yaml | 64 num-viewport:
80 - num-viewport
110 num-viewport = <3>;
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| H A D | ti,am65-pci-host.yaml | 62 num-viewport:
104 - num-viewport
139 num-viewport = <16>;
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| H A D | snps,dw-pcie-ep.yaml | 73 set of viewport CSRs mapped into the PL space. Note iATU is
88 either by means of the embedded PHY viewport schema or by some
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| H A D | snps,dw-pcie.yaml | 82 set of viewport CSRs mapped into the PL space. Note iATU is
97 either by means of the embedded PHY viewport schema or by some
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| H A D | toshiba,visconti-pcie.yaml | 90 num-viewport = <8>;
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| H A D | fsl,layerscape-pcie.yaml | 77 num-viewport:
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| H A D | brcm,stb-pcie.yaml | 89 viewport size of a memory controller. There may be up to
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn201/ |
| H A D | dcn201_dpp.c | 196 if (scl_data->viewport.width != scl_data->h_active && in dpp201_get_optimal_number_of_taps()
197 scl_data->viewport.height != scl_data->v_active && in dpp201_get_optimal_number_of_taps()
202 if (scl_data->viewport.width > scl_data->h_active && in dpp201_get_optimal_number_of_taps()
204 scl_data->viewport.width > dpp->ctx->dc->debug.max_downscale_src_width) in dpp201_get_optimal_number_of_taps()
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| /linux/drivers/video/fbdev/ |
| H A D | sh_mobile_lcdcfb.h | 52 * @base_addr_y: Frame buffer viewport base address (luma component)
53 * @base_addr_c: Frame buffer viewport base address (chroma component)
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| H A D | rv1_clk_mgr.c | 126 * pipe 0: recout=(0,40,1920,980) viewport=(0,0,1920,979) in ramp_up_dispclk_with_dpp()
127 * pipe 1: recout=(0,0,1920,1080) viewport=(0,0,1920,1080) in ramp_up_dispclk_with_dpp()
131 * pipe 0: recout=(0,0,960,1080) viewport=(0,0,960,1080) in ramp_up_dispclk_with_dpp()
132 * pipe 1: recout=(960,0,960,1080) viewport=(960,0,960,1080) in ramp_up_dispclk_with_dpp()
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| /linux/arch/arm64/boot/dts/marvell/ |
| H A D | cn9130-crb-A.dts | 15 num-viewport = <8>;
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| /linux/drivers/usb/phy/ |
| H A D | Makefile | 23 obj-$(CONFIG_USB_ULPI_VIEWPORT) += phy-ulpi-viewport.o
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| H A D | Kconfig | 161 controllers with a viewport register (e.g. Chipidea/ARC controllers).
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_resource.c | 1272 * If viewport has non 0 offset and there are more taps than covered by init then in calculate_init_and_vp()
1274 * outside of viewport. in calculate_init_and_vp()
1285 * If taps are sampling outside of viewport at end of recout and there are more pixels in calculate_init_and_vp()
1286 * available in the surface we should increase the viewport size, regardless set vp to in calculate_init_and_vp()
1297 * Note that outside of viewport all scaling hardware works in recout space. in calculate_init_and_vp()
1354 &data->viewport.x, in calculate_inits_and_viewports()
1355 &data->viewport.width); in calculate_inits_and_viewports()
1374 &data->viewport.y, in calculate_inits_and_viewports()
1375 &data->viewport.height); in calculate_inits_and_viewports()
1387 swap(data->viewport.x, data->viewport.y); in calculate_inits_and_viewports()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_utils.c | 597 phantom->composition.viewport.plane0.height = (long int unsigned) math_min2(math_ceil2( in create_phantom_plane_from_main_plane()
599 (double)main->composition.viewport.plane0.height); in create_phantom_plane_from_main_plane()
600 phantom->composition.viewport.plane1.height = (long int unsigned) math_min2(math_ceil2( in create_phantom_plane_from_main_plane()
602 (double)main->composition.viewport.plane1.height); in create_phantom_plane_from_main_plane()
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| H A D | dml2_core_dcn4_calcs.c | 858 …SwathWidthSingleDPPY[k] = (unsigned int)display_cfg->plane_descriptors[k].composition.viewport.pla… in CalculateSwathWidth()
860 …SwathWidthSingleDPPY[k] = (unsigned int)display_cfg->plane_descriptors[k].composition.viewport.pla… in CalculateSwathWidth()
863 …ortWidth=%lu\n", __func__, k, display_cfg->plane_descriptors[k].composition.viewport.plane0.width); in CalculateSwathWidth()
864 …tHeight=%lu\n", __func__, k, display_cfg->plane_descriptors[k].composition.viewport.plane0.height); in CalculateSwathWidth()
933 …tStationary=%u\n", __func__, k, display_cfg->plane_descriptors[k].composition.viewport.stationary); in CalculateSwathWidth()
941 if (display_cfg->plane_descriptors[k].composition.viewport.stationary && DPPPerSurface[k] == 1) { in CalculateSwathWidth()
942 ….viewport.plane0.x_start + SwathWidthY[k] + req_width_horz_y - 1, req_width_horz_y) - math_floor2(… in CalculateSwathWidth()
949 … if (display_cfg->plane_descriptors[k].composition.viewport.stationary && DPPPerSurface[k] == 1) { in CalculateSwathWidth()
950 ….viewport.plane1.y_start + SwathWidthC[k] + req_width_horz_c - 1, req_width_horz_c) - math_floor2(… in CalculateSwathWidth()
962 if (display_cfg->plane_descriptors[k].composition.viewport.stationary && DPPPerSurface[k] == 1) { in CalculateSwathWidth()
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| H A D | dml2_core_dcn4.c | 290 phantom->composition.viewport.plane0.height = (long int unsigned) math_min2(math_ceil2( in create_phantom_plane_from_main_plane()
292 (double)main->composition.viewport.plane0.height); in create_phantom_plane_from_main_plane()
293 phantom->composition.viewport.plane1.height = (long int unsigned) math_min2(math_ceil2( in create_phantom_plane_from_main_plane()
295 (double)main->composition.viewport.plane1.height); in create_phantom_plane_from_main_plane()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gmc_v9_0.c | 1287 u32 viewport; in gmc_v9_0_get_vbios_fb_size() local
1292 viewport = RREG32_SOC15(DCE, 0, mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION); in gmc_v9_0_get_vbios_fb_size()
1293 size = (REG_GET_FIELD(viewport, in gmc_v9_0_get_vbios_fb_size()
1295 REG_GET_FIELD(viewport, in gmc_v9_0_get_vbios_fb_size()
1300 viewport = RREG32_SOC15(DCE, 0, mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_DCN2); in gmc_v9_0_get_vbios_fb_size()
1301 size = (REG_GET_FIELD(viewport, in gmc_v9_0_get_vbios_fb_size()
1303 REG_GET_FIELD(viewport, in gmc_v9_0_get_vbios_fb_size()
1308 viewport = RREG32_SOC15(DCE, 0, mmSCL0_VIEWPORT_SIZE); in gmc_v9_0_get_vbios_fb_size()
1309 size = (REG_GET_FIELD(viewport, SCL0_VIEWPORT_SIZE, VIEWPORT_HEIGHT) * in gmc_v9_0_get_vbios_fb_size()
1310 REG_GET_FIELD(viewport, SCL0_VIEWPORT_SIZE, VIEWPORT_WIDTH) * in gmc_v9_0_get_vbios_fb_size()
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| /linux/Documentation/admin-guide/media/ |
| H A D | other-usb-cardlist.rst | 41 pwc Logitech ViewPort AV 100 046D:08B7
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| /linux/Documentation/devicetree/bindings/net/pcs/ |
| H A D | snps,dw-xpcs.yaml | 54 to the multiple 256 register sets. There is a special viewport CSR
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| /linux/drivers/pci/controller/ |
| H A D | pcie-brcmstb.c | 975 * offering a non-overlapping viewport to system memory. in brcm_pcie_get_inbound_wins()
1033 * The PCIe host controller by design must set the inbound viewport to in brcm_pcie_get_inbound_wins()
1036 * matters, the viewport must start on a pcie-address that is aligned in brcm_pcie_get_inbound_wins()
1037 * on a multiple of its size. If a portion of the viewport does not in brcm_pcie_get_inbound_wins()
1039 * viewport -- we can map the outbound memory in or after 3GB and even in brcm_pcie_get_inbound_wins()
1040 * though the viewport will overlap the outbound memory the controller in brcm_pcie_get_inbound_wins()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 977 .viewport = pipe_ctx->plane_res.scl_data.viewport, in dcn401_set_cursor_position()
999 if ((pipe_ctx->plane_state->src_rect.width != pipe_ctx->plane_res.scl_data.viewport.width) || in dcn401_set_cursor_position()
1000 (pipe_ctx->plane_state->src_rect.height != pipe_ctx->plane_res.scl_data.viewport.height)) { in dcn401_set_cursor_position()
1030 /* If the cursor's source viewport is clipped then we need to in dcn401_set_cursor_position()
2734 new_pipe->update_flags.bits.viewport = 1; in dcn401_detect_pipe_changes()
2813 …if (memcmp(&old_pipe->plane_res.scl_data.viewport, &new_pipe->plane_res.scl_data.viewport, sizeof(… in dcn401_detect_pipe_changes()
2816 new_pipe->update_flags.bits.viewport = 1; in dcn401_detect_pipe_changes()
3606 /* Step 12: HUBP viewport programming */ in dcn401_update_dchubp_dpp_sequence()
3607 if (pipe_ctx->update_flags.bits.viewport || in dcn401_update_dchubp_dpp_sequence()
3612 &pipe_ctx->plane_res.scl_data.viewport, &pipe_ctx->plane_res.scl_data.viewport_c); in dcn401_update_dchubp_dpp_sequence()
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-ls1043a.dtsi | 918 num-viewport = <6>;
945 num-viewport = <6>;
972 num-viewport = <6>;
|