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Searched +full:uniphier +full:- +full:pro4 +full:- +full:usb2 +full:- +full:phy (Results 1 – 8 of 8) sorted by relevance

/linux/Documentation/devicetree/bindings/soc/socionext/
H A Dsocionext,uniphier-soc-glue.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-soc-glue.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier SoC-glue logic
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 SoC-glue logic implemented on Socionext UniPhier SoCs is a collection of
19 - enum:
20 - socionext,uniphier-ld4-soc-glue
21 - socionext,uniphier-pro4-soc-glue
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/linux/Documentation/devicetree/bindings/phy/
H A Dsocionext,uniphier-usb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier USB2 PHY
10 This describes the devicetree bindings for PHY interface built into
11 USB2 controller implemented on Socionext UniPhier SoCs.
12 Pro4 SoC has both USB2 and USB3 host controllers, however, this USB3
13 controller doesn't include its own High-Speed PHY. This needs to specify
14 USB2 PHY instead of USB3 HS-PHY.
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/linux/drivers/phy/socionext/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # PHY drivers for Socionext platforms.
7 tristate "UniPhier USB2 PHY driver"
13 Enable this to support USB PHY implemented on USB2 controller
14 on UniPhier SoCs. This driver provides interface to interact
15 with USB 2.0 PHY that is part of the UniPhier SoC.
16 In case of Pro4, it is necessary to specify this USB2 PHY instead
17 of USB3 HS-PHY.
20 tristate "UniPhier USB3 PHY driver"
25 Enable this to support USB PHY implemented in USB3 controller
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H A Dphy-uniphier-usb2.c1 // SPDX-License-Identifier: GPL-2.0
3 * phy-uniphier-usb2.c - PHY driver for UniPhier USB2 controller
4 * Copyright 2015-2018 Socionext Inc.
13 #include <linux/phy/phy.h>
22 #define SG_USBPHY12PLL 0x50c /* Pro4 */
25 #define SG_USBPHY4CTRL 0x518 /* Pro4 */
26 #define SG_USBPHY4CTRL2 0x51c /* Pro4 */
27 #define SG_USBPHY34PLL 0x51c /* Pro4 */
41 struct phy *phy; member
47 static int uniphier_u2phy_power_on(struct phy *phy) in uniphier_u2phy_power_on() argument
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/linux/arch/arm/boot/dts/socionext/
H A Duniphier-pro4-sanji.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro4 Sanji Board
8 /dts-v1/;
9 #include "uniphier-pro4.dtsi"
12 model = "UniPhier Pro4 Sanji Board";
13 compatible = "socionext,uniphier-pro4-sanji", "socionext,uniphier-pro4";
16 stdout-path = "serial0:115200n8";
67 &usb2 {
81 phy-handle = <&ethphy>;
85 ethphy: ethernet-phy@1 {
H A Duniphier-pro4-ref.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro4 Reference Board
5 // Copyright (C) 2015-2016 Socionext Inc.
8 /dts-v1/;
9 #include "uniphier-pro4.dtsi"
10 #include "uniphier-ref-daughter.dtsi"
11 #include "uniphier-support-card.dtsi"
14 model = "UniPhier Pro4 Reference Board";
15 compatible = "socionext,uniphier-pro4-ref", "socionext,uniphier-pro4";
18 stdout-path = "serial0:115200n8";
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H A Duniphier-pro4-ace.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro4 Ace Board
8 /dts-v1/;
9 #include "uniphier-pro4.dtsi"
12 model = "UniPhier Pro4 Ace Board";
13 compatible = "socionext,uniphier-pro4-ace", "socionext,uniphier-pro4";
16 stdout-path = "serial0:115200n8";
76 &usb2 {
86 phy-handle = <&ethphy>;
90 ethphy: ethernet-phy@1 {
H A Duniphier-pro4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro4 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "socionext,uniphier-pro4";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
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