1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+ OR MIT 2*724ba675SRob Herring// 3*724ba675SRob Herring// Device Tree Source for UniPhier Pro4 Ace Board 4*724ba675SRob Herring// 5*724ba675SRob Herring// Copyright (C) 2016 Socionext Inc. 6*724ba675SRob Herring// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7*724ba675SRob Herring 8*724ba675SRob Herring/dts-v1/; 9*724ba675SRob Herring#include "uniphier-pro4.dtsi" 10*724ba675SRob Herring 11*724ba675SRob Herring/ { 12*724ba675SRob Herring model = "UniPhier Pro4 Ace Board"; 13*724ba675SRob Herring compatible = "socionext,uniphier-pro4-ace", "socionext,uniphier-pro4"; 14*724ba675SRob Herring 15*724ba675SRob Herring chosen { 16*724ba675SRob Herring stdout-path = "serial0:115200n8"; 17*724ba675SRob Herring }; 18*724ba675SRob Herring 19*724ba675SRob Herring aliases { 20*724ba675SRob Herring serial0 = &serial0; 21*724ba675SRob Herring serial1 = &serial1; 22*724ba675SRob Herring serial2 = &serial2; 23*724ba675SRob Herring i2c0 = &i2c0; 24*724ba675SRob Herring i2c1 = &i2c1; 25*724ba675SRob Herring i2c2 = &i2c2; 26*724ba675SRob Herring i2c3 = &i2c3; 27*724ba675SRob Herring i2c5 = &i2c5; 28*724ba675SRob Herring i2c6 = &i2c6; 29*724ba675SRob Herring ethernet0 = ð 30*724ba675SRob Herring }; 31*724ba675SRob Herring 32*724ba675SRob Herring memory@80000000 { 33*724ba675SRob Herring device_type = "memory"; 34*724ba675SRob Herring reg = <0x80000000 0x40000000>; 35*724ba675SRob Herring }; 36*724ba675SRob Herring}; 37*724ba675SRob Herring 38*724ba675SRob Herring&serial0 { 39*724ba675SRob Herring status = "okay"; 40*724ba675SRob Herring}; 41*724ba675SRob Herring 42*724ba675SRob Herring&serial1 { 43*724ba675SRob Herring status = "okay"; 44*724ba675SRob Herring}; 45*724ba675SRob Herring 46*724ba675SRob Herring&serial2 { 47*724ba675SRob Herring status = "okay"; 48*724ba675SRob Herring}; 49*724ba675SRob Herring 50*724ba675SRob Herring&i2c0 { 51*724ba675SRob Herring status = "okay"; 52*724ba675SRob Herring 53*724ba675SRob Herring eeprom@54 { 54*724ba675SRob Herring compatible = "st,24c64", "atmel,24c64"; 55*724ba675SRob Herring reg = <0x54>; 56*724ba675SRob Herring pagesize = <32>; 57*724ba675SRob Herring }; 58*724ba675SRob Herring}; 59*724ba675SRob Herring 60*724ba675SRob Herring&i2c1 { 61*724ba675SRob Herring status = "okay"; 62*724ba675SRob Herring}; 63*724ba675SRob Herring 64*724ba675SRob Herring&i2c2 { 65*724ba675SRob Herring status = "okay"; 66*724ba675SRob Herring}; 67*724ba675SRob Herring 68*724ba675SRob Herring&i2c3 { 69*724ba675SRob Herring status = "okay"; 70*724ba675SRob Herring}; 71*724ba675SRob Herring 72*724ba675SRob Herring&sd { 73*724ba675SRob Herring status = "okay"; 74*724ba675SRob Herring}; 75*724ba675SRob Herring 76*724ba675SRob Herring&usb2 { 77*724ba675SRob Herring status = "okay"; 78*724ba675SRob Herring}; 79*724ba675SRob Herring 80*724ba675SRob Herring&usb3 { 81*724ba675SRob Herring status = "okay"; 82*724ba675SRob Herring}; 83*724ba675SRob Herring 84*724ba675SRob Herringð { 85*724ba675SRob Herring status = "okay"; 86*724ba675SRob Herring phy-handle = <ðphy>; 87*724ba675SRob Herring}; 88*724ba675SRob Herring 89*724ba675SRob Herring&mdio { 90*724ba675SRob Herring ethphy: ethernet-phy@1 { 91*724ba675SRob Herring reg = <1>; 92*724ba675SRob Herring }; 93*724ba675SRob Herring}; 94*724ba675SRob Herring 95*724ba675SRob Herring&usb0 { 96*724ba675SRob Herring status = "okay"; 97*724ba675SRob Herring}; 98*724ba675SRob Herring 99*724ba675SRob Herring&usb1 { 100*724ba675SRob Herring status = "okay"; 101*724ba675SRob Herring}; 102*724ba675SRob Herring 103*724ba675SRob Herring&ahci0 { 104*724ba675SRob Herring status = "okay"; 105*724ba675SRob Herring}; 106*724ba675SRob Herring 107*724ba675SRob Herring&ahci1 { 108*724ba675SRob Herring status = "okay"; 109*724ba675SRob Herring}; 110