Lines Matching +full:uniphier +full:- +full:pro4 +full:- +full:usb2 +full:- +full:phy

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier USB2 PHY
10   This describes the devicetree bindings for PHY interface built into
11   USB2 controller implemented on Socionext UniPhier SoCs.
12   Pro4 SoC has both USB2 and USB3 host controllers, however, this USB3
13   controller doesn't include its own High-Speed PHY. This needs to specify
14   USB2 PHY instead of USB3 HS-PHY.
17   - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
22       - socionext,uniphier-pro4-usb2-phy
23       - socionext,uniphier-ld11-usb2-phy
25   "#address-cells":
28   "#size-cells":
32   "^phy@[0-9]+$":
41           The ID number for the PHY
43       "#phy-cells":
46       vbus-supply:
50       - reg
51       - "#phy-cells"
54   - compatible
55   - "#address-cells"
56   - "#size-cells"
61   - |
62     // The UniPhier usb2-phy should be a subnode of a "syscon" compatible node.
64     usb-hub {
65         compatible = "socionext,uniphier-ld11-usb2-phy";
66         #address-cells = <1>;
67         #size-cells = <0>;
69         usb_phy0: phy@0 {
71             #phy-cells = <0>;
74         usb_phy1: phy@1 {
76             #phy-cells = <0>;
79         usb_phy2: phy@2 {
81             #phy-cells = <0>;