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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,rpmh-rsc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpmh-rsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
15 resources can be written to the Trigger Command Set (TCS) registers and
16 using a (addr, val) pair and triggered. Messages in the TCS are then sent in
25 A TCS may be triggered from Linux or triggered by the F/W after all the CPUs
26 have powered off to facilitate idle power saving. TCS could be classified as::
27 ACTIVE - Triggered by Linux
[all …]
/linux/drivers/soc/qcom/
H A Drpmh-rsc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
31 #include <soc/qcom/cmd-db.h>
32 #include <soc/qcom/tcs.h>
33 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
35 #include "rpmh-internal.h"
38 #include "trace-rpmh.h"
71 /* DRV TCS Configuration Information Register */
77 /* Offsets for CONTROL TCS Registers */
[all …]
/linux/drivers/net/ethernet/intel/ice/
H A Dice_dcb_lib.c1 // SPDX-License-Identifier: GPL-2.0
9 * ice_dcb_get_ena_tc - return bitmap of enabled TCs
10 * @dcbcfg: DCB config to evaluate for enabled TCs
43 if (vsi->tc_cfg.ena_tc & BIT(i)) in ice_is_pfc_causing_hung_q()
47 for (tc = 0; tc < num_tcs - 1; tc++) in ice_is_pfc_causing_hung_q()
48 if (ice_find_q_in_range(vsi->tc_cfg.tc_info[tc].qoffset, in ice_is_pfc_causing_hung_q()
49 vsi->tc_cfg.tc_info[tc + 1].qoffset, in ice_is_pfc_causing_hung_q()
56 up2tc = rd32(&pf->hw, PRTDCB_TUP2TC); in ice_is_pfc_causing_hung_q()
70 ref_prio_xoff[i] = pf->stats.priority_xoff_rx[i]; in ice_is_pfc_causing_hung_q()
76 if (pf->stats.priority_xoff_rx[i] > ref_prio_xoff[i]) in ice_is_pfc_causing_hung_q()
[all …]
H A Dice_dcb_nl.c1 // SPDX-License-Identifier: GPL-2.0
11 * ice_dcbnl_devreset - perform enough of a ifdown/ifup to sync DCBNL info
18 while (ice_is_reset_in_progress(pf->state)) in ice_dcbnl_devreset()
28 * ice_dcbnl_getets - retrieve local ETS configuration
38 dcbxcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg; in ice_dcbnl_getets()
40 ets->willing = dcbxcfg->etscfg.willing; in ice_dcbnl_getets()
41 ets->ets_cap = dcbxcfg->etscfg.maxtcs; in ice_dcbnl_getets()
42 ets->cbs = dcbxcfg->etscfg.cbs; in ice_dcbnl_getets()
43 memcpy(ets->tc_tx_bw, dcbxcfg->etscfg.tcbwtable, sizeof(ets->tc_tx_bw)); in ice_dcbnl_getets()
44 memcpy(ets->tc_rx_bw, dcbxcfg->etscfg.tcbwtable, sizeof(ets->tc_rx_bw)); in ice_dcbnl_getets()
[all …]
H A Dice_dcb.c1 // SPDX-License-Identifier: GPL-2.0
13 * @buf: pointer to the caller-supplied buffer to store the MIB block
33 return -EINVAL; in ice_aq_get_lldp_mib()
37 cmd->type = mib_type & ICE_AQ_LLDP_MIB_TYPE_M; in ice_aq_get_lldp_mib()
38 cmd->type |= FIELD_PREP(ICE_AQ_LLDP_BRID_TYPE_M, bridge_type); in ice_aq_get_lldp_mib()
45 *local_len = le16_to_cpu(cmd->local_len); in ice_aq_get_lldp_mib()
47 *remote_len = le16_to_cpu(cmd->remote_len); in ice_aq_get_lldp_mib()
74 cmd->command |= ICE_AQ_LLDP_MIB_UPDATE_DIS; in ice_aq_cfg_lldp_mib_change()
76 cmd->command |= FIELD_PREP(ICE_AQ_LLDP_MIB_PENDING_M, in ice_aq_cfg_lldp_mib_change()
105 cmd->command |= ICE_AQ_LLDP_AGENT_SHUTDOWN; in ice_aq_stop_lldp()
[all …]
/linux/drivers/net/ethernet/aquantia/atlantic/
H A Daq_ptp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) 2014-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
21 /* Index must to be 8 (8 TCs) or 16 (4 TCs).
63 struct hwtstamp_config *config);
65 struct hwtstamp_config *config);
128 return -EOPNOTSUPP; in aq_ptp_xmit()
133 struct hwtstamp_config *config) {} in aq_ptp_hwtstamp_config_get() argument
135 struct hwtstamp_config *config) in aq_ptp_hwtstamp_config_set() argument
H A Daq_main.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2014-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
55 aq_nic->ndev = ndev; in aq_ndev_alloc()
56 ndev->netdev_ops = &aq_ndev_ops; in aq_ndev_alloc()
57 ndev->ethtool_ops = &aq_ethtool_ops; in aq_ndev_alloc()
108 if (unlikely(aq_utils_obj_test(&aq_nic->flags, AQ_NIC_PTP_DPATH_UP))) { in aq_ndev_start_xmit()
116 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) || in aq_ndev_start_xmit()
117 unlikely((ip_hdr(skb)->version == 4) && in aq_ndev_start_xmit()
118 (ip_hdr(skb)->protocol == IPPROTO_UDP) && in aq_ndev_start_xmit()
[all …]
/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_dcb_82599.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
10 * ixgbe_dcb_config_rx_arbiter_82599 - Config Rx Data arbiter
70 * ixgbe_dcb_config_tx_desc_arbiter_82599 - Config Tx Desc. arbiter
88 /* Clear the per-Tx queue credits; we use per-TC instead */ in ixgbe_dcb_config_tx_desc_arbiter_82599()
121 * ixgbe_dcb_config_tx_data_arbiter_82599 - Config Tx Data arbiter
183 * ixgbe_dcb_config_pfc_82599 - Configure priority flow control
204 * So clear all TCs and only enable those that should be in ixgbe_dcb_config_pfc_82599()
209 if (hw->mac.type >= ixgbe_mac_X540) in ixgbe_dcb_config_pfc_82599()
235 reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_dcb_config_pfc_82599()
[all …]
H A Dixgbe_82598.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
25 * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
30 * than the 10ms recommended by the pci-e spec. To address this we need to
31 * increase the value to either 10ms to 250ms for capability version 1 config,
39 if (ixgbe_removed(hw->hw_addr)) in ixgbe_set_pcie_completion_timeout()
56 * for version 2 capabilities we need to write the config space in ixgbe_set_pcie_completion_timeout()
71 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_get_invariants_82598()
76 mac->mcft_size = IXGBE_82598_MC_TBL_SIZE; in ixgbe_get_invariants_82598()
77 mac->vft_size = IXGBE_82598_VFT_TBL_SIZE; in ixgbe_get_invariants_82598()
[all …]
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_dcb_nl.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
13 * i40e_get_pfc_delay - retrieve PFC Link Delay
28 * i40e_dcbnl_ieee_getets - retrieve local IEEE ETS configuration
40 if (!(pf->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) in i40e_dcbnl_ieee_getets()
41 return -EINVAL; in i40e_dcbnl_ieee_getets()
43 dcbxcfg = &pf->hw.local_dcbx_config; in i40e_dcbnl_ieee_getets()
44 ets->willing = dcbxcfg->etscfg.willing; in i40e_dcbnl_ieee_getets()
45 ets->ets_cap = I40E_MAX_TRAFFIC_CLASS; in i40e_dcbnl_ieee_getets()
46 ets->cbs = dcbxcfg->etscfg.cbs; in i40e_dcbnl_ieee_getets()
[all …]
H A Di40e_dcb.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
22 return -EINVAL; in i40e_get_dcbx_status()
41 u8 *buf = tlv->tlvinfo; in i40e_parse_ieee_etscfg_tlv()
47 * -------------------------- in i40e_parse_ieee_etscfg_tlv()
48 * |will-|CBS | Re- | Max | in i40e_parse_ieee_etscfg_tlv()
49 * |ing | |served| TCs | in i40e_parse_ieee_etscfg_tlv()
50 * -------------------------- in i40e_parse_ieee_etscfg_tlv()
53 etscfg = &dcbcfg->etscfg; in i40e_parse_ieee_etscfg_tlv()
54 etscfg->willing = FIELD_GET(I40E_IEEE_ETS_WILLING_MASK, buf[offset]); in i40e_parse_ieee_etscfg_tlv()
[all …]
H A Di40e_main.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
31 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
57 /* i40e_pci_tbl - PCI Device ID Table
97 static int debug = -1;
116 if (is_unicast_ether_addr(f->macaddr) || is_link_local_ether_addr(f->macaddr)) in netdev_hw_addr_refcnt()
117 ha_list = &netdev->uc; in netdev_hw_addr_refcnt()
119 ha_list = &netdev->mc; in netdev_hw_addr_refcnt()
122 if (ether_addr_equal(ha->addr, f->macaddr)) { in netdev_hw_addr_refcnt()
123 ha->refcount += delta; in netdev_hw_addr_refcnt()
[all …]
/linux/arch/mips/kernel/
H A Dvpe-mt.c22 /* The number of TCs and VPEs physically available on the core */
37 pr_warn("VPE loader: only Master VPE's are able to config MT\n"); in vpe_run()
40 return -1; in vpe_run()
46 if (list_empty(&v->tc)) { in vpe_run()
52 v->minor); in vpe_run()
54 return -ENOEXEC; in vpe_run()
57 t = list_first_entry(&v->tc, struct tc, tc); in vpe_run()
62 settc(t->index); in vpe_run()
72 t->index); in vpe_run()
74 return -ENOEXEC; in vpe_run()
[all …]
/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Di40e.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999-2018 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Intel(R) Ethernet Flow Director
16 - Additional Configurations
17 - Known Issues
18 - Support
47 ----------------------
49 …intel.com/content/dam/www/public/us/en/documents/release-notes/xl710-ethernet-controller-feature-m…
[all …]
/linux/drivers/regulator/
H A Dfan53555.c1 // SPDX-License-Identifier: GPL-2.0
158 if (di->sleep_vol_cache == uV) in fan53555_set_suspend_voltage()
163 ret = regmap_update_bits(rdev->regmap, di->sleep_reg, in fan53555_set_suspend_voltage()
164 di->desc.vsel_mask, ret); in fan53555_set_suspend_voltage()
169 di->sleep_vol_cache = uV; in fan53555_set_suspend_voltage()
178 return regmap_update_bits(rdev->regmap, di->sleep_en_reg, in fan53555_set_suspend_enable()
186 return regmap_update_bits(rdev->regmap, di->sleep_en_reg, in fan53555_set_suspend_disable()
196 regmap_update_bits(rdev->regmap, di->mode_reg, in fan53555_set_mode()
197 di->mode_mask, di->mode_mask); in fan53555_set_mode()
200 regmap_update_bits(rdev->regmap, di->vol_reg, di->mode_mask, 0); in fan53555_set_mode()
[all …]
/linux/drivers/net/ethernet/qlogic/qed/
H A Dqed_init_fw_funcs.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2021 Marvell International Ltd.
36 0x100) - 1 : 0)
53 #define VOQS_BIT_MASK (BIT(MAX_NUM_VOQS) - 1)
79 #define QM_VP_WFQ_BYPASS_THRESH (QM_VP_WFQ_MIN_INC_VAL - 100)
98 /* RL increment value - rate is specified in mbps */
133 (ext_voq) * (PBF_REG_YCMD_QS_NUM_LINES_VOQ1_RT_OFFSET - \
138 (ext_voq) * (PBF_REG_BTB_GUARANTEED_VOQ1_RT_OFFSET - \
145 ((((pbf_cmd_lines) - 4) * 2) | QM_LINE_CRD_REG_SIGN_BIT)
[all …]
/linux/drivers/i2c/busses/
H A Di2c-virtio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * https://raw.githubusercontent.com/oasis-tcs/virtio-spec/master/virtio-i2c.tex
23 * struct virtio_i2c - virtio I2C data
35 * struct virtio_i2c_req - the virtio I2C request structure
54 complete(&req->completion); in virtio_i2c_msg_done()
70 * Only 7-bit mode supported for this moment. For the address in virtio_i2c_prepare_reqs()
78 if (i != num - 1) in virtio_i2c_prepare_reqs()
119 wait_for_completion(&req->completion); in virtio_i2c_complete_reqs()
121 if (!failed && req->in_hdr.status != VIRTIO_I2C_MSG_OK) in virtio_i2c_complete_reqs()
137 struct virtqueue *vq = vi->vq; in virtio_i2c_xfer()
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-sdx55.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interconnect/qcom,sdx55.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
[all …]
H A Dqcom-sdx65.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx65.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
15 #include <dt-bindings/interconnect/qcom,sdx65.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsm4450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm4450-camcc.h>
8 #include <dt-bindings/clock/qcom,sm4450-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm4450-gcc.h>
10 #include <dt-bindings/clock/qcom,sm4450-gpucc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
16 interrupt-parent = <&intc>;
[all …]
H A Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,sdx75.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/mailbox/qcom-ipcc.h>
17 #include <dt-bindings/power/qcom,rpmhpd.h>
[all …]
H A Dsdm670.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include <dt-bindings/phy/phy-qcom-qusb2.h>
[all …]
/linux/drivers/net/ethernet/hisilicon/hns3/
H A Dhnae3.h1 /* SPDX-License-Identifier: GPL-2.0+ */
2 // Copyright (c) 2016-2017 Hisilicon Limited.
74 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
77 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
111 test_bit(HNAE3_DEV_SUPPORT_FD_B, (ae_dev)->caps)
114 test_bit(HNAE3_DEV_SUPPORT_GRO_B, (ae_dev)->caps)
117 test_bit(HNAE3_DEV_SUPPORT_FEC_B, (hdev)->ae_dev->caps)
120 test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, (hdev)->ae_dev->caps)
123 test_bit(HNAE3_DEV_SUPPORT_QB_B, (hdev)->ae_dev->caps)
126 test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, (hdev)->ae_dev->caps)
[all …]
/linux/drivers/iio/common/ms_sensors/
H A Dms_sensors_i2c.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2015 Measurement-Specialties
38 * ms_sensors_reset() - Reset function
54 dev_err(&client->dev, "Failed to reset device\n"); in ms_sensors_reset()
64 * ms_sensors_read_prom_word() - PROM word read function
80 dev_err(&client->dev, "Failed to read prom word\n"); in ms_sensors_read_prom_word()
90 * ms_sensors_convert_and_read() - ADC conversion & read function
125 dev_dbg(&client->dev, "ADC raw value : %x\n", be32_to_cpu(buf) >> 8); in ms_sensors_convert_and_read()
130 dev_err(&client->dev, "Unable to make sensor adc conversion\n"); in ms_sensors_convert_and_read()
136 * ms_sensors_crc_valid() - CRC check function
[all …]
/linux/drivers/net/ethernet/freescale/dpaa2/
H A Ddpni.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2016 Freescale Semiconductor Inc.
20 * DPNI_MAX_TC - Maximum number of traffic classes
24 * DPNI_MAX_DPBP - Maximum number of buffer pools per DPNI
29 * DPNI_ALL_TCS - All traffic classes considered; see dpni_set_queue()
31 #define DPNI_ALL_TCS (u8)(-1)
33 * DPNI_ALL_TC_FLOWS - All flows within traffic class considered; see
36 #define DPNI_ALL_TC_FLOWS (u16)(-1)
38 * DPNI_NEW_FLOW_ID - Generate new flow ID; see dpni_set_queue()
40 #define DPNI_NEW_FLOW_ID (u16)(-1)
[all …]

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