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Searched +full:t8103 +full:- +full:nco (Results 1 – 6 of 6) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dapple,nco.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/apple,nco.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple SoCs' NCO block
10 - Martin Povišer <povik+lin@cutebit.org>
13 The NCO (Numerically Controlled Oscillator) block found on Apple SoCs
14 such as the t8103 (M1) is a programmable clock generator performing
23 - enum:
24 - apple,t6000-nco
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/linux/arch/arm64/boot/dts/apple/
H A Dt8103.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * Apple T8103 "M1" SoC
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
16 compatible = "apple,t8103", "apple,arm-platform";
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <2>;
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H A Dt8112.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
14 #include <dt-bindings/spmi/spmi.h>
17 compatible = "apple,t8112", "apple,arm-platform";
19 #address-cells = <2>;
20 #size-cells = <2>;
23 #address-cells = <2>;
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/linux/Documentation/devicetree/bindings/sound/
H A Dapple,mca.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Martin Povišer <povik+lin@cutebit.org>
18 - $ref: dai-common.yaml#
23 - enum:
24 - apple,t6000-mca
25 - apple,t8103-mca
26 - apple,t8112-mca
27 - const: apple,mca
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/linux/drivers/clk/
H A Dclk-apple-nco.c1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
4 * found on t8103 (M1) and other Apple chips
11 #include <linux/clk-provider.h>
37 * base divisor is adjusted on a cycle-by-cycle basis based on the state of a
38 * 32-bit phase accumulator to achieve a desired precise clock ratio over the
43 * bit of the 32-bit accumulator is set. The accumulator is incremented each
47 * Because the NCO hardware implements counting of input clock cycles in part
48 * in a Galois linear-feedback shift register, the higher bits of divisor
56 #define LFSR_PERIOD ((1 << LFSR_LEN) - 1)
82 val = readl_relaxed(chan->base + REG_CTRL); in applnco_enable_nolock()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
66 This driver supports NCO (Numerically Controlled Oscillator) blocks
67 found on Apple SoCs such as t8103 (M1). The blocks are typically
88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
98 multi-function device has one fixed-rate oscillator, clocked
129 be pre-programmed to support other configurations and features not yet
178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
196 For example, the CDCE925 contains two PLLs with spread-spectrum
206 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
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