Searched full:sysclk_div (Results 1 – 5 of 5) sorted by relevance
/linux/drivers/clk/mmp/ |
H A D | clk-audio.c | 66 struct clk_divider sysclk_div; member 264 priv->sysclk_div.hw.init = CLK_HW_INIT_HW("sys_div", in register_clocks() 267 priv->sysclk_div.reg = priv->mmio_base + SSPA_AUD_CTRL; in register_clocks() 268 priv->sysclk_div.shift = SSPA_AUD_CTRL_SYSCLK_DIV_SHIFT; in register_clocks() 269 priv->sysclk_div.width = 6; in register_clocks() 270 priv->sysclk_div.flags = CLK_DIVIDER_ONE_BASED; in register_clocks() 271 priv->sysclk_div.flags |= CLK_DIVIDER_ROUND_CLOSEST; in register_clocks() 272 priv->sysclk_div.flags |= CLK_DIVIDER_ALLOW_ZERO; in register_clocks() 273 ret = devm_clk_hw_register(dev, &priv->sysclk_div.hw); in register_clocks() 278 &priv->sysclk_div.hw, &clk_gate_ops, in register_clocks()
|
/linux/arch/arm/boot/dts/ti/omap/ |
H A D | am43xx-clocks.dtsi | 415 sysclk_div: clock-sysclk-div { label 418 clock-output-names = "sysclk_div"; 428 clocks = <&sysclk_div>, <&dpll_disp_m2_ck>; 523 clocks = <&sysclk_div>; 568 clocks = <&sysclk_div>, <&dpll_core_m5_ck>, <&dpll_disp_m2_ck>; 610 clocks = <&sysclk_div>, <&dpll_per_m2_ck>; 755 clocks = <&sysclk_div>; 818 clocks = <&clk_rc32k_ck>, <&sysclk_div>, <&dpll_ddr_m2_ck>,
|
H A D | am4372.dtsi | 469 clocks = <&sysclk_div>, /* icss_iep_gclk */ 555 clocks = <&sysclk_div>, /* icss_iep_gclk */
|
/linux/Documentation/devicetree/bindings/soc/ti/ |
H A D | ti,pruss.yaml | 482 clocks = <&sysclk_div>, /* icss_iep */
|
/linux/sound/soc/codecs/ |
H A D | wm8996.h | 1615 #define WM8996_SYSCLK_DIV 0x0002 /* SYSCLK_DIV */ 1616 #define WM8996_SYSCLK_DIV_MASK 0x0002 /* SYSCLK_DIV */ 1617 #define WM8996_SYSCLK_DIV_SHIFT 1 /* SYSCLK_DIV */ 1618 #define WM8996_SYSCLK_DIV_WIDTH 1 /* SYSCLK_DIV */
|