Home
last modified time | relevance | path

Searched +full:sub +full:- +full:mailbox (Results 1 – 25 of 72) sorted by relevance

123

/linux/Documentation/devicetree/bindings/mailbox/
H A Dti,omap-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI OMAP2+ and K3 Mailbox devices
10 - Suman Anna <s-anna@ti.com>
13 The OMAP Mailbox hardware facilitates communication between different
14 processors using a queued mailbox interrupt mechanism. The IP block is
19 Each mailbox IP block/cluster has a certain number of h/w fifo queues and
35 lines can also be routed to different processor sub-systems on DRA7xx as they
[all …]
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,omap-remoteproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The OMAP family of SoCs usually have one or more slave processor sub-systems
14 that are used to offload some of the processor-intensive tasks, or to manage
17 The processor cores in the sub-system are usually behind an IOMMU, and may
18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
[all …]
H A Dti,k3-dsp-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
14 that are used to offload some of the processor-intensive tasks or algorithms,
17 These processor sub-systems usually contain additional sub-modules like
23 Each DSP Core sub-system is represented as a single DT node. Each node has a
31 - ti,am62a-c7xv-dsp
[all …]
H A Dti,k3-m4f-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-m4f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hari Nagalla <hnagalla@ti.com>
11 - Mathieu Poirier <mathieu.poirier@linaro.org>
20 $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
25 - ti,am64-m4fss
27 power-domains:
30 "#address-cells":
[all …]
H A Dti,k3-r5f-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F
20 AM64x SoCs do not support LockStep mode, but rather a new non-safety mode
21 called "Single-CPU" mode, where only Core0 is used, but with ability to use
27 Each Dual-Core R5F sub-system is represented as a single DTS node
40 - ti,am62-r5fss
[all …]
H A Dqcom,sc7280-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <quic_sibis@quicinc.com>
19 - qcom,sc7280-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
26 reg-names:
28 - const: qdsp6
[all …]
/linux/include/linux/platform_data/
H A Dwilco-ec.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 /* Message flags for using the mailbox() interface */
25 * struct wilco_ec_device - Wilco Embedded Controller handle.
27 * @mailbox_lock: Mutex to ensure one mailbox command at a time.
28 * @io_command: I/O port for mailbox command. Provided by ACPI.
29 * @io_data: I/O port for mailbox data. Provided by ACPI.
30 * @io_packet: I/O port for mailbox packet data. Provided by ACPI.
34 * @debugfs_pdev: The child platform_device used by the debugfs sub-driver.
35 * @rtc_pdev: The child platform_device used by the RTC sub-driver.
36 * @charger_pdev: Child platform_device used by the charger config sub-driver.
[all …]
/linux/Documentation/devicetree/bindings/firmware/
H A Darm,scpi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sudeep Holla <sudeep.holla@arm.com>
33 - const: arm,scpi # SCPI v1.0 and above
34 - const: arm,scpi-pre-1.0 # Unversioned SCPI before v1.0
35 - items:
36 - enum:
37 - amlogic,meson-gxbb-scpi
38 - const: arm,scpi-pre-1.0
[all …]
H A Darm,scmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sudeep Holla <sudeep.holla@arm.com>
26 - $ref: /schemas/firmware/nxp,imx95-scmi.yaml
34 - description: SCMI compliant firmware with mailbox transport
36 - const: arm,scmi
37 - description: SCMI compliant firmware with ARM SMC/HVC transport
39 - const: arm,scmi-smc
40 - description: SCMI compliant firmware with ARM SMC/HVC transport
[all …]
/linux/drivers/scsi/lpfc/
H A Dlpfc_mbox.c4 * Copyright (C) 2017-2024 Broadcom. All Rights Reserved. The term *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
47 * lpfc_mbox_rsrc_prep - Prepare a mailbox with DMA buffer memory.
49 * @mbox: pointer to the driver internal queue element for mailbox command.
51 * A mailbox command consists of the pool memory for the command, @mbox, and
69 return -ENOMEM; in lpfc_mbox_rsrc_prep()
71 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); in lpfc_mbox_rsrc_prep()
72 if (!mp->virt) { in lpfc_mbox_rsrc_prep()
[all …]
H A Dlpfc_sli.c4 * Copyright (C) 2017-2025 Broadcom. All Rights Reserved. The term *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
110 /* Word 0, 1, 2 - BDE is variable */ in lpfc_wqe_cmd_template()
112 /* Word 3 - cmd_buff_len, payload_offset_len is zero */ in lpfc_wqe_cmd_template()
114 /* Word 4 - total_xfer_len is variable */ in lpfc_wqe_cmd_template()
116 /* Word 5 - is zero */ in lpfc_wqe_cmd_template()
118 /* Word 6 - ctxt_tag, xri_tag is variable */ in lpfc_wqe_cmd_template()
121 bf_set(wqe_cmnd, &wqe->fcp_iread.wqe_com, CMD_FCP_IREAD64_WQE); in lpfc_wqe_cmd_template()
[all …]
/linux/drivers/net/ethernet/mellanox/mlxsw/
H A Dcmd.h1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
190 /* QUERY_FW - Query Firmware
191 * -------------------------
193 * -----------------------
212 * Firmware Revision - Major
217 * Firmware Sub-minor version (Patch level)
222 * Firmware Revision - Minor
233 * every time a non-backward-compatible change is done for the command
250 * Firmware timestamp - hour
[all …]
/linux/drivers/crypto/ccp/
H A Dpsp-dev.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2017-2019 Advanced Micro Devices, Inc.
19 #include <linux/psp-platform-access.h>
21 #include "sp-dev.h"
82 * enum psp_cmd - PSP mailbox commands
99 * struct psp_ext_req_buffer_hdr - Structure of the extended command header
116 * enum psp_sub_cmd - PSP mailbox sub commands
/linux/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_mbx.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
7 * fm10k_fifo_init - Initialize a message FIFO
10 * @size: maximum message size to store in FIFO, must be 2^n - 1
14 fifo->buffer = buffer; in fm10k_fifo_init()
15 fifo->size = size; in fm10k_fifo_init()
16 fifo->head = 0; in fm10k_fifo_init()
17 fifo->tail = 0; in fm10k_fifo_init()
21 * fm10k_fifo_used - Retrieve used space in FIFO
28 return fifo->tail - fifo->head; in fm10k_fifo_used()
[all …]
/linux/include/linux/platform_data/x86/
H A Dintel_pmc_ipc.h1 /* SPDX-License-Identifier: GPL-2.0 */
31 * intel_pmc_ipc() - PMC IPC Mailbox accessor
35 * Return: 0 on success. Non-zero on mailbox error
55 return -EINVAL; in intel_pmc_ipc()
59 * 1: IPC Sub Command in intel_pmc_ipc()
61 * 3-6: Write Buffer for offset in intel_pmc_ipc()
63 params[0].integer.value = ipc_cmd->cmd; in intel_pmc_ipc()
64 params[1].integer.value = ipc_cmd->sub_cmd; in intel_pmc_ipc()
65 params[2].integer.value = ipc_cmd->size; in intel_pmc_ipc()
66 params[3].integer.value = ipc_cmd->wbuf[0]; in intel_pmc_ipc()
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Domap-usb.txt4 - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
5 - ti,hwmods : must be "usb_otg_hs"
6 - multipoint : Should be "1" indicating the musb controller supports
7 multipoint. This is a MUSB configuration-specific setting.
8 - num-eps : Specifies the number of endpoints. This is also a
9 MUSB configuration-specific setting. Should be set to "16"
10 - ram-bits : Specifies the ram address size. Should be set to "12"
11 - interface-type : This is a board specific setting to describe the type of
14 - mode : Should be "3" to represent OTG. "1" signifies HOST and "2"
16 - power : Should be "50". This signifies the controller can supply up to
[all …]
/linux/include/uapi/linux/
H A Disst_if.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
16 * struct isst_if_platform_info - Define platform information
25 * @mmio_supported: Support of mmio interface for core-power feature
40 * struct isst_if_cpu_map - CPU mapping between logical and physical CPU
53 * struct isst_if_cpu_maps - structure for CPU map IOCTL
67 * struct isst_if_io_reg - Read write PUNIT IO register
84 * struct isst_if_io_regs - structure for IO register commands
99 * struct isst_if_mbox_cmd - Structure to define mail box command
101 * @parameter: Mailbox parameter value
102 * @req_data: Request data for the mailbox
[all …]
/linux/drivers/crypto/bcm/
H A Dcipher.h2 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <linux/mailbox/brcm-message.h>
41 /* size of salt value for AES-GCM-ESP and AES-CCM-ESP */
53 * Maximum number of bytes from a non-final hash request that can be deferred
59 /* Force at least 4-byte alignment of all SPU message fields */
62 /* Number of times to resend mailbox message if mb queue is full */
80 * SPUM_NS2 and SPUM_NSP are the SPU-M block on Northstar 2 and Northstar Plus,
126 * SPU request message header. For SPU-M, holds MH, EMH, SCTX, BDESC,
140 /* SPU-M request message STATUS field */
159 * -OR- tweak value when XTS/AES is used
[all …]
/linux/drivers/net/ethernet/netronome/nfp/
H A Dnfp_net_ctrl.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
17 /* 64-bit per app capabilities */
23 * THB-350, 32k needs to be reserved.
61 /* Hash type pre-pended when a RSS hash was computed */
80 /* Read/Write config words (0x0000 - 0x002c)
87 * %NFP_NET_CFG_EXN: MSI-X table entry for exceptions
88 * %NFP_NET_CFG_LSC: MSI-X table entry for link state changes
92 * - define Error details in UPDATE
108 #define NFP_NET_CFG_CTRL_RXQINQ (0x1 << 13) /* Enable S-tag strip */
[all …]
/linux/drivers/cxl/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
26 The CXL specification defines a "CXL memory device" sub-class in the
29 memory to be mapped into the system address map (Host-managed Device
34 and management primarily via the mailbox interface. See Chapter 2.3
70 (https://www.computeexpresslink.org/spec-landing). The CXL core
98 known as HDM "Host-managed Device Memory".
110 Enable support for CXL Features. A CXL device that includes a mailbox
143 Documentation/ABI/testing/sysfs-edac-scrub.
161 Documentation/ABI/testing/sysfs-edac-ecs.
182 Documentation/ABI/testing/sysfs-edac-memory-repair.
[all …]
/linux/drivers/platform/x86/intel/speed_select_if/
H A Disst_if_common.c1 // SPDX-License-Identifier: GPL-2.0
23 #include <asm/intel-family.h>
94 return -ENOMEM; in isst_store_new_cmd()
96 sst_cmd->cpu = cpu; in isst_store_new_cmd()
97 sst_cmd->cmd = cmd; in isst_store_new_cmd()
98 sst_cmd->mbox_cmd_type = mbox_cmd_type; in isst_store_new_cmd()
99 sst_cmd->param = param; in isst_store_new_cmd()
100 sst_cmd->data = data; in isst_store_new_cmd()
102 hash_add(isst_hash, &sst_cmd->hnode, sst_cmd->cmd); in isst_store_new_cmd()
114 hash_del(&sst_cmd->hnode); in isst_delete_hash()
[all …]
/linux/drivers/dpll/zl3073x/
H A Ddpll.c1 // SPDX-License-Identifier: GPL-2.0-only
28 * struct zl3073x_dpll_pin - DPLL pin
65 * zl3073x_dpll_is_input_pin - check if the pin is input one
73 return pin->dir == DPLL_PIN_DIRECTION_INPUT; in zl3073x_dpll_is_input_pin()
77 * zl3073x_dpll_is_p_pin - check if the pin is P-pin
80 * Return: true if the pin is P-pin, false if it is N-pin
85 return zl3073x_is_p_pin(pin->id); in zl3073x_dpll_is_p_pin()
96 *direction = pin->dir; in zl3073x_dpll_pin_direction_get()
102 * zl3073x_dpll_input_ref_frequency_get - get input reference frequency
115 struct zl3073x_dev *zldev = zldpll->dev; in zl3073x_dpll_input_ref_frequency_get()
[all …]
/linux/drivers/net/ethernet/intel/idpf/
H A Didpf_controlq.h1 /* SPDX-License-Identifier: GPL-2.0-only */
15 (&(((struct idpf_ctlq_desc *)((R)->desc_ring.va))[i]))
18 ((u16)((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->ring_size) + \
19 (R)->next_to_clean - (R)->next_to_use - 1))
64 /* Flags sub-structure
92 u32 chnl_opcode; /* avoid confusion with desc->opcode */
93 u32 chnl_retval; /* ditto for desc->retval */
97 /* Max number of MMIO regions not including the mailbox and rstat regions in
120 /* control queue - send and receive */
/linux/drivers/net/ethernet/hisilicon/hns3/hns3vf/
H A Dhclgevf_mbx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
13 return resp_code ? -resp_code : 0; in hclgevf_resp_to_errno()
22 hdev->mbx_resp.received_resp = false; in hclgevf_reset_mbx_resp_status()
23 hdev->mbx_resp.origin_mbx_msg = 0; in hclgevf_reset_mbx_resp_status()
24 hdev->mbx_resp.resp_status = 0; in hclgevf_reset_mbx_resp_status()
25 hdev->mbx_resp.match_id++; in hclgevf_reset_mbx_resp_status()
27 if (hdev->mbx_resp.match_id == 0) in hclgevf_reset_mbx_resp_status()
28 hdev->mbx_resp.match_id = HCLGEVF_MBX_MATCH_ID_START; in hclgevf_reset_mbx_resp_status()
29 memset(hdev->mbx_resp.additional_info, 0, HCLGE_MBX_MAX_RESP_DATA_SIZE); in hclgevf_reset_mbx_resp_status()
[all …]
/linux/sound/pci/mixart/
H A Dmixart.c1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <linux/dma-mapping.h>
36 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
67 switch(pipe->status) { in mixart_set_pipe_state()
76 dev_err(&mgr->pci->dev, in mixart_set_pipe_state()
77 "error mixart_set_pipe_state called with wrong pipe->status!\n"); in mixart_set_pipe_state()
78 return -EINVAL; /* function called with wrong pipe status */ in mixart_set_pipe_state()
92 dev_err(&mgr->pci->dev, in mixart_set_pipe_state()
101 group_state.pipe_uid = pipe->group_uid; in mixart_set_pipe_state()
108 request.uid = pipe->group_uid; /*(struct mixart_uid){0,0};*/ in mixart_set_pipe_state()
[all …]

123