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/linux/drivers/pinctrl/
H A Dpinctrl-mcp23s08_spi.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* MCP23S08 SPI GPIO driver */
8 #include <linux/spi/spi.h>
10 #include "pinctrl-mcp23s08.h"
18 * Driver data holds all the per-chip data.
29 struct spi_device *spi = to_spi_device(mcp->dev); in mcp23sxx_spi_write() local
31 struct spi_transfer t[2] = { { .tx_buf = &mcp->addr, .len = 1, }, in mcp23sxx_spi_write()
38 return spi_sync(spi, &m); in mcp23sxx_spi_write()
46 struct spi_device *spi = to_spi_device(mcp->dev); in mcp23sxx_spi_gather_write() local
48 struct spi_transfer t[3] = { { .tx_buf = &mcp->addr, .len = 1, }, in mcp23sxx_spi_gather_write()
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmicrochip,mcp23s08.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip I/O expander with serial interface (I2C/SPI)
10 - Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
14 chips.These chips provide 8 or 16 GPIO pins with either I2C or SPI interface.
17 - $ref: /schemas/spi/spi-peripheral-props.yaml#
22 - microchip,mcp23s08
23 - microchip,mcp23s17
24 - microchip,mcp23s18
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/linux/Documentation/devicetree/bindings/sound/
H A Drenesas,idt821034.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
16 The time-slots used by the codec must be set and so, the properties
17 'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and
18 'dai-tdm-slot-rx-mask' must be present in the ALSA sound card node for
19 sub-nodes that involve the codec. The codec uses one 8bit time-slot per
21 'dai-tdm-tdm-slot-with' must be set to 8.
26 - $ref: /schemas/spi/spi-peripheral-props.yaml#
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H A Dinfineon,peb2466.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
13 The Infineon PEB2466 codec is a programmable DSP-based four channels codec
16 The time-slots used by the codec must be set and so, the properties
17 'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and
18 'dai-tdm-slot-rx-mask' must be present in the sound card node for sub-nodes
19 that involve the codec. The codec uses one 8bit time-slot per channel.
20 'dai-tdm-tdm-slot-with' must be set to 8.
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/linux/sound/pci/ice1712/
H A Ddelta.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * Lowlevel functions for M-Audio Delta 1010, 44, 66, Dio2496, Audiophile
44 * MidiMan M-Audio Delta GPIO definitions
47 /* MidiMan M-Audio Delta shared pins */
52 /* 0 = valid signal is present */
57 /* (writing on rising edge - 0->1) */
64 /* MidiMan M-Audio DeltaDiO */
73 /* MidiMan M-Audio Delta1010 */
79 /* 1 - clock are taken from S/PDIF input */
80 /* 0 - clock are taken from Word Clock input */
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/linux/drivers/iio/adc/
H A Dmcp3564.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2022-2023 Microchip Technology Inc. and its subsidiaries
10 …s/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP3561-2-4-Family-Data-Sheet-DS20006181…
12 …ds/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3561_2_4R-Data-Sheet-DS200006391C.pdf
14 …ProductDocuments/DataSheets/MCP3461-2-4-Two-Four-Eight-Channel-153.6-ksps-Low-Noise-16-Bit-Delta-S…
16 …/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3461-2-4R-Family-Data-Sheet-DS20006404…
22 #include <linux/spi/spi.h>
35 /* Internal clock is selected and AMCLK is present on the analog master clock output pin */
37 /* Internal clock is selected and no clock output is present on the CLK pin */
64 * ADC Output Data Format 32-bit (25-bit right justified data + Channel ID):
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H A Dti-ads7950.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments ADS7950 SPI ADC driver
12 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
26 #include <linux/spi/spi.h>
36 * Device tree users encode that via the vref-supply regulator.
52 /* val = value, dec = left shift, bits = number of bits of the mask */
54 (((val) >> (dec)) & ((1 << (bits)) - 1))
61 (TI_ADS7950_MAN_CMD(TI_ADS7950_CR_WRITE | st->cmd_settings_bitmask))
64 (TI_ADS7950_GPIO_CMD(st->gpio_cmd_settings_bitmask))
67 struct spi_device *spi; member
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H A Dad4695.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SPI ADC driver for Analog Devices Inc. AD4695 and similar chips
30 #include <linux/spi/spi.h>
33 #include <dt-bindings/iio/adi,ad4695.h>
124 struct spi_device *spi; member
189 .name = "ad4695-8",
219 .name = "ad4695-16",
296 * ad4695_set_single_cycle_mode - Set the device in single cycle mode
312 ret = regmap_clear_bits(st->regmap, AD4695_REG_SEQ_CTRL, in ad4695_set_single_cycle_mode()
318 ret = regmap_write(st->regmap, AD4695_REG_AS_SLOT(0), in ad4695_set_single_cycle_mode()
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/linux/drivers/iio/gyro/
H A Dadxrs290.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ADXRS290 SPI Gyroscope Driver
15 #include <linux/spi/spi.h>
68 struct spi_device *spi; member
75 /* Ensure correct alignment of timestamp when present */
83 * Available cut-off frequencies of the low pass filter in Hz.
98 * Available cut-off frequencies of the high pass filter in Hz.
121 mutex_lock(&st->lock); in adxrs290_get_rate_data()
122 temp = spi_w8r16(st->spi, cmd); in adxrs290_get_rate_data()
131 mutex_unlock(&st->lock); in adxrs290_get_rate_data()
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/linux/drivers/net/wireless/broadcom/brcm80211/include/
H A Dchipcommon.h1 // SPDX-License-Identifier: ISC
49 /* gpio - cleared only by power-on-reset */
222 #define CID_ID_MASK 0x0000ffff /* Chip Id mask */
223 #define CID_REV_MASK 0x000f0000 /* Chip Revision mask */
225 #define CID_PKG_MASK 0x00f00000 /* Package Option mask */
234 #define CC_CAP_MIPSEB 0x00000004 /* MIPS is in big-endian mode */
239 #define CC_CAP_EXTBUS_MASK 0x000000c0 /* External bus mask */
240 #define CC_CAP_EXTBUS_NONE 0x00000000 /* No ExtBus present */
249 #define CC_CAP_JTAGP 0x00400000 /* JTAG Master Present */
251 #define CC_CAP_BKPLN64 0x08000000 /* 64-bit backplane */
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/linux/drivers/mfd/
H A Dezx-pcap.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for Motorola PCAP2 as present in EZX phones
14 #include <linux/mfd/ezx-pcap.h>
15 #include <linux/spi/spi.h>
34 struct spi_device *spi; member
66 pcap->buf = *data; in ezx_pcap_putget()
67 t.tx_buf = (u8 *) &pcap->buf; in ezx_pcap_putget()
68 t.rx_buf = (u8 *) &pcap->buf; in ezx_pcap_putget()
69 status = spi_sync(pcap->spi, &m); in ezx_pcap_putget()
72 *data = pcap->buf; in ezx_pcap_putget()
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/linux/drivers/iio/dummy/
H A Diio_simple_dummy.c1 // SPDX-License-Identifier: GPL-2.0-only
12 * as being present to allow us to 'fake' the presence of hardware.
31 * struct iio_dummy_accel_calibscale - realworld to register mapping
32 * @val: first value in read_raw - here integer part.
33 * @val2: second value in read_raw etc - here micro part.
34 * @regval: register value - magic device specific numbers.
51 * simple event - triggered when value rises above
61 * simple step detect event - triggered when a step is detected
70 * simple transition event - triggered when the reported running confidence
80 * simple transition event - triggered when the reported walking confidence
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/linux/drivers/rtc/
H A Drtc-ds1305.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rtc-ds1305.c -- driver for DS1305 and DS1306 SPI RTC chips
14 #include <linux/spi/spi.h>
15 #include <linux/spi/ds1305.h>
20 * Registers ... mask DS1305_WRITE into register address to write,
21 * otherwise you're reading it. All non-bitmask values are BCD.
27 * - Need fancy "hours" encoding in 12hour mode
28 * - Don't rely on the "day-of-week" field (or tm_wday)
29 * - Are a 21st-century clock (2000 <= year < 2100)
50 * NOTE ALSO that while we could generate once-a-second IRQs (UIE), we
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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,gic.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marc Zyngier <marc.zyngier@arm.com>
14 interrupts (PPI), shared processor interrupts (SPI) and software
22 - $ref: /schemas/interrupt-controller.yaml#
27 - items:
28 - enum:
29 - arm,arm11mp-gic
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/linux/Documentation/devicetree/bindings/mfd/
H A Dst,stmpe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 peripherals connected to SPI or I2C.
15 - Linus Walleij <linus.walleij@linaro.org>
18 - $ref: /schemas/spi/spi-peripheral-props.yaml#
23 - st,stmpe601
24 - st,stmpe801
25 - st,stmpe811
26 - st,stmpe1600
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/linux/net/netfilter/
H A Dxt_HMARK.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * xt_HMARK - Netfilter module to set mark by means of hashing
40 static inline __be32 hmark_addr6_mask(const __be32 *addr32, const __be32 *mask) in hmark_addr6_mask() argument
42 return (addr32[0] & mask[0]) ^ in hmark_addr6_mask()
43 (addr32[1] & mask[1]) ^ in hmark_addr6_mask()
44 (addr32[2] & mask[2]) ^ in hmark_addr6_mask()
45 (addr32[3] & mask[3]); in hmark_addr6_mask()
49 hmark_addr_mask(int l3num, const __be32 *addr32, const __be32 *mask) in hmark_addr_mask() argument
53 return *addr32 & *mask; in hmark_addr_mask()
55 return hmark_addr6_mask(addr32, mask); in hmark_addr_mask()
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/linux/Documentation/devicetree/bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
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/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_npc_fs.c1 // SPDX-License-Identifier: GPL-2.0
45 [NPC_IPSEC_SPI] = "SPI ",
62 struct npc_mcam *mcam = &rvu->hw->mcam; in npc_is_feature_supported()
66 mcam_features = is_npc_intf_tx(intf) ? mcam->tx_features : mcam->rx_features; in npc_is_feature_supported()
87 struct npc_key_field *field = &mcam->rx_key_fields[type]; in npc_set_kw_masks()
91 if (mcam->banks_per_entry == 1) in npc_set_kw_masks()
93 else if (mcam->banks_per_entry == 2) in npc_set_kw_masks()
99 field = &mcam->tx_key_fields[type]; in npc_set_kw_masks()
105 field->kw_mask[start_kwi] |= GENMASK_ULL(nr_bits - 1, 0) in npc_set_kw_masks()
107 field->nr_kws = 1; in npc_set_kw_masks()
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/linux/arch/arm/boot/dts/renesas/
H A Dr7s9210.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r7s9210-cpg-mssr.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <1>;
16 #size-cells = <1>;
20 #clock-cells = <0>;
21 compatible = "fixed-clock";
23 clock-frequency = <0>;
27 #clock-cells = <0>;
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/linux/drivers/net/can/sja1000/
H A Dpeak_pcmcia.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2010-2012 Stephane Grosjean <s.grosjean@peak-system.com>
5 * CAN driver for PEAK-System PCAN-PC Card
7 * Copyright (C) 2006-2010 PEAK System-Technik GmbH
22 MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>");
23 MODULE_DESCRIPTION("CAN driver for PEAK-System PCAN-PC Cards");
26 /* PEAK-System PCMCIA driver name */
89 /* time waiting for SPI busy (prevent from infinite loop) */
92 /* max count of reading the SPI status register waiting for a change */
117 * This means normal output mode, push-pull and the correct polarity.
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/linux/Documentation/networking/dsa/
H A Dsja1105.rst8 The NXP SJA1105 is a family of 10 SPI-managed automotive switches:
10 - SJA1105E: First generation, no TTEthernet
11 - SJA1105T: First generation, TTEthernet
12 - SJA1105P: Second generation, no TTEthernet, no SGMII
13 - SJA1105Q: Second generation, TTEthernet, no SGMII
14 - SJA1105R: Second generation, no TTEthernet, SGMII
15 - SJA1105S: Second generation, TTEthernet, SGMII
16 - SJA1110A: Third generation, TTEthernet, SGMII, integrated 100base-T1 and
17 100base-TX PHYs
18 - SJA1110B: Third generation, TTEthernet, SGMII, 100base-T1, 100base-TX
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/linux/drivers/spi/
H A Dspi-s3c64xx.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <linux/dma-mapping.h>
17 #include <linux/platform_data/spi-s3c64xx.h>
20 #include <linux/spi/spi.h>
27 /* Registers and bit-fields */
112 #define FIFO_LVL_MASK(i) ((i)->port_conf->fifo_lvl_mask[i->port_id])
114 (1 << (i)->port_conf->tx_st_done)) ? 1 : 0)
115 #define TX_FIFO_LVL(v, sdd) (((v) & (sdd)->tx_fifomask) >> \
116 __ffs((sdd)->tx_fifomask))
117 #define RX_FIFO_LVL(v, sdd) (((v) & (sdd)->rx_fifomask) >> \
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/linux/drivers/net/ethernet/microchip/
H A Denc28j60.c1 // SPDX-License-Identifier: GPL-2.0+
26 #include <linux/spi/spi.h>
38 /* Buffer size required for the largest SPI transfer (i.e., reading a
57 struct spi_device *spi; member
77 } debug = { -1 };
80 * SPI read buffer
81 * Wait for the SPI transfer and copy received data to destination.
86 struct device *dev = &priv->spi->dev; in spi_read_buf()
87 u8 *rx_buf = priv->spi_transfer_buf + 4; in spi_read_buf()
88 u8 *tx_buf = priv->spi_transfer_buf; in spi_read_buf()
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/linux/arch/arm64/boot/dts/marvell/
H A Darmada-3720-turris-mox.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/bus/moxtet.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include "armada-372x.dtsi"
16 compatible = "cznic,turris-mox", "marvell,armada3720",
28 stdout-path = "serial0:115200n8";
37 compatible = "gpio-leds";
41 linux,default-trigger = "default-on";
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/linux/drivers/irqchip/
H A Dirq-brcmstb-l2.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014-2024 Broadcom
48 .cpu_clear = -1, /* Register not present */
65 * brcmstb_l2_mask_and_ack - Mask and ack pending interrupt
68 * Chip has separate enable/disable registers instead of a single mask
81 u32 mask = d->mask; in brcmstb_l2_mask_and_ack() local
84 irq_reg_writel(gc, mask, ct->regs.disable); in brcmstb_l2_mask_and_ack()
85 *ct->mask_cache &= ~mask; in brcmstb_l2_mask_and_ack()
86 irq_reg_writel(gc, mask, ct->regs.ack); in brcmstb_l2_mask_and_ack()
99 status = irq_reg_readl(b->gc, b->status_offset) & in brcmstb_l2_intc_irq_handle()
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