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/linux/Documentation/devicetree/bindings/spi/
H A Dicpdas-lp8841-spi-rtc.txt1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
4 memory register, which acts as an SPI master device.
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
21 Requirements to SPI slave nodes:
23 - There can be only one slave device.
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H A Dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
11 be common properties like spi-max-frequency, spi-cs-high, etc. or they could
14 per-peripheral and there can be multiple peripherals attached to a
20 - Mark Brown <broonie@kernel.org>
28 - minimum: 0
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/linux/Documentation/devicetree/bindings/rtc/
H A Dmaxim-ds1302.txt1 * Maxim/Dallas Semiconductor DS-1302 RTC
5 The device uses the standard MicroWire half-duplex transfer timing.
12 - compatible : Should be "maxim,ds1302"
14 Required SPI properties:
16 - reg : Should be address of the device chip select within
19 - spi-max-frequency : DS-1302 has 500 kHz if powered at 2.2V,
22 - spi-3wire : The device has a shared signal IN/OUT line.
24 - spi-lsb-first : DS-1302 requires least significant bit first
27 - spi-cs-high: DS-1302 has active high chip select line. This is
32 spi@901c {
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/linux/drivers/iio/adc/
H A Dmax11100.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2016-17 Renesas Electronics Corporation
7 * Copyright (C) 2016-17 Jacopo Mondi
14 #include <linux/spi/spi.h>
21 * LSB is the ADC single digital step
22 * 1 LSB = (vref_mv / 2 ^ 16)
24 * LSB is used to calculate analog voltage value
27 * Ain = (count * LSB)
33 struct spi_device *spi; member
55 ret = spi_read(state->spi, state->buffer, sizeof(state->buffer)); in max11100_read_single()
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H A Dad7280a.c1 // SPDX-License-Identifier: GPL-2.0
22 #include <linux/spi/spi.h>
129 #define AD7280A_NUM_CH (AD7280A_AUX_ADC_6_REG - \
135 (c) - AD7280A_CELLS_PER_DEV)
143 /* 5-bit device address is sent LSB first */
169 struct spi_device *spi; member
203 unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10); in ad7280_check_crc()
206 return -EIO; in ad7280_check_crc()
221 if (st->readback_delay_us < 50) in ad7280_delay()
222 udelay(st->readback_delay_us); in ad7280_delay()
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H A Dad7380.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * ad7380/1 : https://www.analog.com/media/en/technical-documentation/data-sheets/AD7380-7381.pdf
10 * ad7383/4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-7384.pdf
11 …* ad7386/7/8 : https://www.analog.com/media/en/technical-documentation/data-sheets/AD7386-7387-738…
12 * ad7380-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7380-4.pdf
13 * ad7381-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7381-4.pdf
14 …* ad7383/4-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-4-ad7384
15 …* ad7386/7/8-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7386-4-7387
16 * ad7389-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7389-4.pdf
17 * adaq4370-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4370-4.pdf
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/linux/tools/spi/
H A Dspidev_fdx.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/spi/spidev.h>
42 status -= 2; in do_read()
44 while (status-- > 0) in do_read()
75 for (bp = buf; len; len--) in do_msg()
82 __u8 lsb, bits; in dumpstat() local
86 perror("SPI rd_mode"); in dumpstat()
89 if (ioctl(fd, SPI_IOC_RD_LSB_FIRST, &lsb) < 0) { in dumpstat()
90 perror("SPI rd_lsb_fist"); in dumpstat()
94 perror("SPI bits_per_word"); in dumpstat()
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/linux/drivers/mfd/
H A Docelot-spi.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * SPI core driver for the Ocelot chip family.
6 * SPI to the VSC7511, VSC7512, VSC7513 and VSC7514 chips. The main functions
7 * are to prepare the chip's SPI interface for a specific bus speed, and a host
11 * Copyright 2021-2022 Innovative Advantage Inc.
13 * Author: Colin Foster <colin.foster@in-advantage.com>
24 #include <linux/spi/spi.h>
63 * The SPI address must be big-endian, but we want the payload to match in ocelot_spi_initialize()
68 * 0b00: little-endian, MSB first in ocelot_spi_initialize()
72 * 0b01: big-endian, MSB first in ocelot_spi_initialize()
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/linux/drivers/spi/
H A Dspi-lp8841-rtc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * SPI host driver for ICP DAS LP-8841 RTC
11 * Copyright (C) 2003 - 2007 Paul Mundt
18 #include <linux/spi/spi.h>
29 * REVISIT If there is support for SPI_3WIRE and SPI_LSB_FIRST in SPI
30 * GPIO driver, this SPI driver can be replaced by a simple GPIO driver
43 data->state |= SPI_LP8841_RTC_CLK; in setsck()
45 data->state &= ~SPI_LP8841_RTC_CLK; in setsck()
46 writeb(data->state, data->iomem); in setsck()
53 data->state |= SPI_LP8841_RTC_MOSI; in setmosi()
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H A Dspi-ppc4xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SPI_PPC4XX SPI controller driver.
9 * Based in part on drivers/spi/spi_s3c24xx.c
17 * The PPC4xx SPI controller has no FIFO so each sent/received byte will
20 * during SPI transfers by setting max_speed_hz via the device tree.
35 #include <linux/spi/spi.h>
36 #include <linux/spi/spi_bitbang.h>
39 #include <asm/dcr-regs.h>
41 /* bits in mode register - bit 0 is MSb */
54 * SPI_PPC4XX_MODE_RD = 0 means "MSB first" - this is the normal mode
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H A Dspi-fsl-espi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <linux/spi/spi.h>
118 return ioread32be(espi->reg_base + offset); in fsl_espi_read_reg()
123 return ioread16be(espi->reg_base + offset); in fsl_espi_read_reg16()
128 return ioread8(espi->reg_base + offset); in fsl_espi_read_reg8()
134 iowrite32be(val, espi->reg_base + offset); in fsl_espi_write_reg()
140 iowrite16be(val, espi->reg_base + offset); in fsl_espi_write_reg16()
146 iowrite8(val, espi->reg_base + offset); in fsl_espi_write_reg8()
151 struct fsl_espi *espi = spi_controller_get_devdata(m->spi->controller); in fsl_espi_check_message()
152 struct spi_transfer *t, *first; in fsl_espi_check_message() local
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H A Dspi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // SPI init/core code
9 #include <linux/clk/clk-conf.h>
13 #include <linux/dma-mapping.h>
34 #include <linux/spi/offload/types.h>
35 #include <linux/spi/spi.h>
36 #include <linux/spi/spi-mem.h>
40 #include <trace/events/spi.h>
50 struct spi_device *spi = to_spi_device(dev); in spidev_release() local
52 spi_controller_put(spi->controller); in spidev_release()
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H A Dspi-stm32.c1 // SPDX-License-Identifier: GPL-2.0
3 // STMicroelectronics STM32 SPI Controller driver
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
12 #include <linux/dma-mapping.h>
23 #include <linux/spi/spi.h>
27 /* STM32F4/7 SPI registers */
83 /* STM32F4 SPI Baud Rate min/max divisor */
87 /* STM32H7 SPI registers */
162 /* STM32MP25 SPI registers bit fields */
176 /* STM32H7 SPI Master Baud Rate min/max divisor */
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H A Dspi-rspi.c1 // SPDX-License-Identifier: GPL-2.0
8 * Based on spi-sh.c:
21 #include <linux/dma-mapping.h>
26 #include <linux/spi/spi.h>
40 #define RSPI_SPND 0x0e /* Next-Access Delay Register */
68 /* SPCR - Control Register */
77 #define SPCR_SPMS 0x01 /* 3-wire Mode (vs. 4-wire) */
78 /* QSPI on R-Car Gen2 only */
79 #define SPCR_WSWAP 0x02 /* Word Swap of read-data for DMAC */
80 #define SPCR_BSWAP 0x01 /* Byte Swap of read-data for DMAC */
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/linux/Documentation/spi/
H A Dspidev.rst2 SPI userspace API
5 SPI devices have a limited userspace API, supporting basic half-duplex
6 read() and write() access to SPI slave devices. Using ioctl() requests,
15 #include <linux/spi/spidev.h>
19 * Prototyping in an environment that's not crash-prone; stray pointers
23 as SPI slaves, which you may need to change quite often.
33 The spidev driver contains lists of SPI devices that are supported for
36 The following are the SPI device tables supported by the spidev driver:
38 - struct spi_device_id spidev_spi_ids[]: list of devices that can be
42 - struct of_device_id spidev_dt_ids[]: list of devices that can be
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H A Dspi-summary.rst2 Overview of Linux kernel SPI support
5 02-Feb-2012
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
12 standardization body. SPI uses a host/target configuration.
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
22 SPI hosts use a fourth "chip select" line to activate a given SPI target
24 in parallel. All SPI targets support chipselects; they are usually active
29 SPI target functions are usually not interoperable between vendors
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/linux/drivers/crypto/caam/
H A Dpdb.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright 2008-2016 Freescale Semiconductor, Inc.
14 * PDB- IPSec ESP Header Modification Options
19 * Encap and Decap - Decrement TTL (Hop Limit) - Based on the value of the
27 * Decap - DiffServ Copy - Copy the IPv4 TOS or IPv6 Traffic Class byte
32 * Encap- Copy DF bit -if an IPv4 tunnel mode outer IP header is coming from
47 * PDB - IPSec ESP Encap/Decap Options
50 #define PDBOPTS_ESP_ARS32 0x40 /* 32-entry antireplay window */
51 #define PDBOPTS_ESP_ARS128 0x80 /* 128-entry antireplay window */
52 #define PDBOPTS_ESP_ARS64 0xc0 /* 64-entry antireplay window */
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/linux/drivers/clk/
H A Dclk-lmk04832.c1 // SPDX-License-Identifier: GPL-2.0
3 * LMK04832 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner
14 #include <linux/clk-provider.h>
20 #include <linux/spi/spi.h>
22 /* 0x000 - 0x00d System Functions */
34 /* 0x100 - 0x137 Device Clock and SYSREF Clock Output Control */
75 /* 0x138 - 0x145 SYSREF, SYNC, and Device Config */
124 /* 0x146 - 0x14a CLKin Control */
134 /* 0x14b - 0x152 Holdover */
136 /* 0x153 - 0x15f PLL1 Configuration */
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/linux/drivers/iio/resolver/
H A Dad2s1210.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2010 Analog Devices Inc.
11 * ----------------------------|------|-------------------------------------------
23 * Resolution | D1:0 | *device tree: assigned-resolution-bits*
34 * ----------------------------------------|----|---------------------------------
60 #include <linux/spi/spi.h>
119 /* Threshold voltage registers have 1 LSB == 38 mV */
153 /* adi,fixed-mode property - only valid when mode_gpios == NULL. */
159 /** For reading raw sample value via SPI. */
170 /** SPI transmit buffer. */
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/linux/drivers/char/tpm/
H A Dtpm_tis_spi_cr50.c1 // SPDX-License-Identifier: GPL-2.0
5 * This device driver implements a TCG PTP FIFO interface over SPI for chips
15 #include <linux/spi/spi.h>
23 * - can go to sleep not earlier than after CR50_SLEEP_DELAY_MSEC.
24 * - needs up to CR50_WAKE_START_DELAY_USEC to wake after sleep.
25 * - requires waiting for "ready" IRQ, if supported; or waiting for at least
27 * - waits for up to CR50_FLOW_CONTROL for flow control 'ready' indication.
69 cr50_phy->irq_confirmed = true; in cr50_spi_irq_handler()
70 complete(&cr50_phy->spi_phy.ready); in cr50_spi_irq_handler()
81 unsigned long allowed_access = phy->last_access + phy->access_delay; in cr50_ensure_access_delay()
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/linux/include/linux/spi/
H A Dsh_msiof.h1 /* SPDX-License-Identifier: GPL-2.0 */
31 #define SIMDR1_SYNCMD_SPI 2U /* Level mode/SPI */
33 #define SIMDR1_SYNCAC BIT(25) /* Sync Polarity (1 = Active-low) */
34 #define SIMDR1_BITLSB BIT(24) /* MSB/LSB First (1 = LSB first) */
37 #define SIMDR1_FLD GENMASK(3, 2) /* Frame Sync Signal Interval (0-3) */
46 #define SIMDR2_BITLEN1 GENMASK(28, 24) /* Data Size (8-32 bits) */
47 #define SIMDR2_WDLEN1 GENMASK(23, 16) /* Word Count (1-64/256 (SH, A1))) */
48 #define SIMDR2_GRPMASK GENMASK(3, 0) /* Group Output Mask 1-4 (SH, A1) */
51 #define SIMDR3_BITLEN2 GENMASK(28, 24) /* Data Size (8-32 bits) */
52 #define SIMDR3_WDLEN2 GENMASK(23, 16) /* Word Count (1-64/256 (SH, A1))) */
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/linux/include/linux/
H A Dregmap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
54 #define REGMAP_UPSHIFT(s) (-(s))
73 * struct reg_default - Default value for a register.
87 * struct reg_sequence - An individual write from a sequence of writes.
110 * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
116 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please
123 * Returns: 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
137 * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs
143 * @delay_us: Time to udelay between reads in us (0 tight-loops). Please
151 * this macro then first setup your regmap for atomic use (flat or no cache
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/linux/drivers/net/wireless/ti/wlcore/
H A Dspi.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2008-2009 Nokia Corporation
16 #include <linux/spi/spi.h>
51 ((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
63 /* Maximum number of SPI write chunks */
69 .nvs_name = "ti-connectivity/wl127x-nvs.bin",
74 .nvs_name = "ti-connectivity/wl128x-nvs.bin",
79 .cfg_name = "ti-connectivity/wl18xx-conf.bin",
80 .nvs_name = "ti-connectivity/wl1271-nvs.bin",
91 struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent); in wl12xx_spi_reset()
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/linux/drivers/hwmon/
H A Dadt7411.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for the ADT7411 (I2C/SPI 8 channel 10 bit ADC & temperature-sensor)
7 * TODO: SPI, use power-down mode for suspend?, interrupt handling?
18 #include <linux/hwmon-sysfs.h>
63 ? 0x2b + 2 * ((nr)-2) \
66 ? 0x2c + 2 * ((nr)-2) \
111 * When reading a register containing (up to 4) lsb, all associated
112 * msb-registers get locked by the hardware. After _one_ of those msb is read,
113 * _all_ are unlocked. In order to use this locking correctly, reading lsb/msb
122 mutex_lock(&data->device_lock); in adt7411_read_10_bit()
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/linux/arch/powerpc/include/asm/
H A Dcpm1.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 * are needed. -- Dan
13 * On the MBX board, EPPC-Bug loads CPM microcode into the first 512
38 #define CPM_CR_CH_SPI ((ushort)0x0005) /* SPI / IDMA2 / Timers */
331 uint sen_tbuf0data0; /* Save area 0 - current frame */
332 uint sen_tbuf0data1; /* Save area 1 - current frame */
338 ushort sen_paddrl; /* physical address (LSB) */
340 ushort sen_rfbdptr; /* Rx first BD pointer */
341 ushort sen_tfbdptr; /* Tx first BD pointer */
343 uint sen_tbuf1data0; /* Save area 0 - current frame */
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