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/freebsd/sys/contrib/device-tree/Bindings/hwmon/
H A Dgpio-fan.txt4 - compatible : "gpio-fan"
7 - gpios: Specifies the pins that map to bits in the control value,
8 ordered MSB-->LSB.
9 - gpio-fan,speed-map: A mapping of possible fan RPM speeds and the
12 - alarm-gpios: This pin going active indicates something is wrong with
14 - #cooling-cells: If used as a cooling device, must be <2>
16 Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml
17 min and max states are derived from the speed-map of the fan.
19 Note: At least one the "gpios" or "alarm-gpios" properties must be set.
24 compatible = "gpio-fan";
[all …]
/freebsd/usr.sbin/kbdcontrol/
H A Dkbdcontrol.11 .\"-
2 .\" SPDX-License-Identifer: BSD-2-Clause
4 .\" kbdcontrol - syscons or vt keyboard driver configuration utility
32 .Ar delay . Ns Ar repeat | Ar speed
47 such as key map, keyboard repeat and delay rates, bell
58 .Bl -tag -widt
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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dnvidia,tegra194-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra186-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra210-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xus
[all...]
/freebsd/contrib/ncurses/progs/
H A Dtset.c2 * Copyright 2020-2021,2024 Thomas E. Dickey *
3 * Copyright 1998-2016,2017 Free Software Foundation, Inc. *
31 * Author: Zeyd M. Ben-Halim <zmbenhal@netcom.com> 1992,1995 *
33 * and: Thomas E. Dickey 1996-on *
53 * tset.c - terminal initialization utility
60 /*-
117 int cmp = LOWERCASE(*a) - LOWERCASE(*b); in CaselessCmp()
122 return LOWERCASE(*a) - LOWERCASE(*b); in CaselessCmp()
153 if ((int) len < (int) sizeof(temp) - 12) { in failed()
159 _nc_STRNCAT(temp, msg, sizeof(temp), sizeof(temp) - strlen(temp) - 2); in failed()
[all …]
/freebsd/stand/efi/loader/
H A Dbootinfo.c1 /*-
72 int speed, port; in bi_getboothowto() local
93 * If we found a 8250 com port and com speed, we need to in bi_getboothowto()
109 speed = -1; in bi_getboothowto()
110 port = -1; in bi_getboothowto()
113 speed = strtol(tmp, NULL, 0); in bi_getboothowto()
126 if (speed != -1 && port != -1) { in bi_getboothowto()
128 speed); in bi_getboothowto()
158 if ((desc->Attribute & EFI_MEMORY_RUNTIME) != 0) { in efi_do_vmap()
160 desc->VirtualStart = desc->PhysicalStart; in efi_do_vmap()
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dintel-gw-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/intel-gw-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rahul Tanwar <rtanwar@maxlinear.com>
16 const: intel,lgm-pcie
18 - compatible
21 - $ref: /schemas/pci/snps,dw-pcie.yaml#
26 - const: intel,lgm-pcie
27 - const: snps,dw-pcie
[all …]
H A Dtoshiba,visconti-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/toshiba,visconti-pci
[all...]
H A Dti,j721e-pci-host.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-host.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kishon Vijay Abraham I <kishon@ti.com>
16 - const: ti,j721e-pcie-host
17 - const: ti,j784s4-pcie-host
18 - description: PCIe controller in AM64
20 - const: ti,am64-pcie-host
[all …]
H A Dti,am65-pci-host.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/pci/ti,am65-pci-host.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kishon Vijay Abraham I <kishon@ti.com>
14 - $ref: /schemas/pci/pci-host-bridge.yaml#
19 - ti,am654-pcie-rc
20 - ti,keystone-pcie
25 reg-names:
[all …]
H A Dnvidia,tegra194-pcie.txt4 and thus inherits all the common properties defined in snps,dw-pcie.yaml and
5 snps,dw-pcie-ep.yaml.
10 - power-domains: A phandle to the node that controls power to the respective
20 "include/dt-bindings/power/tegra194-powergate.h" file.
21 - reg: A list of physical base address and length pairs for each set of
22 controller registers. Must contain an entry for each entry in the reg-names
24 - reg-names: Must include the following entries:
26 "config": As per the definition in snps,dw-pcie.yaml
32 - interrupts: A list of interrupt outputs of the controller. Must contain an
33 entry for each entry in the interrupt-names property.
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Drainier.dts15 /dts-v1/;
18 #address-cells = <2>;
19 #size-cells = <1>;
22 dcr-parent = <&{/cpus/cpu@0}>;
34 #address-cells = <1>;
35 #size-cells = <0>;
41 clock-frequency = <0>; /* Filled in by zImage */
42 timebase-frequency = <0>; /* Filled in by zImage */
43 i-cache-line-size = <32>;
44 d-cache-line-size = <32>;
[all …]
H A Dbamboo.dts14 /dts-v1/;
17 #address-cells = <2>;
18 #size-cells = <1>;
21 dcr-parent = <&{/cpus/cpu@0}>;
33 #address-cells = <1>;
34 #size-cells = <0>;
40 clock-frequency = <0>; /* Filled in by zImage */
41 timebase-frequency = <0>; /* Filled in by zImage */
42 i-cache-line-size = <32>;
43 d-cache-line-size = <32>;
[all …]
H A Dsequoia.dts15 /dts-v1/;
18 #address-cells = <2>;
19 #size-cells = <1>;
22 dcr-parent = <&{/cpus/cpu@0}>;
34 #address-cells = <1>;
35 #size-cells = <0>;
41 clock-frequency = <0>; /* Filled in by zImage */
42 timebase-frequency = <0>; /* Filled in by zImage */
43 i-cache-line-size = <32>;
44 d-cache-line-size = <32>;
[all …]
H A Dyosemite.dts12 /dts-v1/;
15 #address-cells = <2>;
16 #size-cells = <1>;
19 dcr-parent = <&{/cpus/cpu@0}>;
31 #address-cells = <1>;
32 #size-cells = <0>;
38 clock-frequency = <0>; /* Filled in by zImage */
39 timebase-frequency = <0>; /* Filled in by zImage */
40 i-cache-line-size = <32>;
41 d-cache-line-size = <32>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Dmaxim,max8952.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: regulator.yaml#
19 max8952,default-mode:
25 max8952,dvs-mode-microvolt:
35 max8952,en-gpio:
40 max8952,ramp-speed:
45 Voltage ramp speed, values map to:
[all …]
/freebsd/sys/contrib/device-tree/src/mips/ralink/
H A Dmt7621.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 #include <dt-bindings/interrupt-controller/mips-gic.h>
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/clock/mt7621-clk.h>
5 #include <dt-bindings/reset/mt7621-reset.h>
8 compatible = "mediatek,mt7621-soc";
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
[all …]
/freebsd/contrib/ofed/infiniband-diags/man/
H A Dibnetdiscover.85 IBNETDISCOVER \- discover InfiniBand topology
7 .nr rst2man-indent-level 0
10 \\$1 \\n[an-margin]
11 level \\n[rst2man-indent-level]
12 level margin: \\n[rst2man-indent\\n[rst2man-indent-level]]
13 -
14 \\n[rst2man-indent0]
15 \\n[rst2man-indent1]
16 \\n[rst2man-indent2]
21 . nr rst2man-indent\\n[rst2man-indent-level] \\n[an-margin]
[all …]
/freebsd/contrib/llvm-project/clang/include/clang/Lex/
H A DHeaderSearchOptions.h1 //===- HeaderSearchOptions.h ------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
18 #include <map>
26 /// IncludeDirGroup - Identifies the group an include Entry belongs to,
29 /// start searching at the Quoted group (specified by '-iquote'),
32 /// '\#include ""' paths, added by 'gcc -iquote'.
35 /// Paths for '\#include <>' added by '-I'.
65 /// HeaderSearchOptions - Helper class for storing options related to the
75 /// IgnoreSysRoot - This is false if an absolute path should be treated
[all …]
/freebsd/sys/dev/iicbus/
H A Diicbus_if.m1 #-
41 iicbus_default_frequency(device_t bus, u_char speed)
123 u_char speed;
139 # symbolic speed. Only the IIC_SLOW speed has meaning, it is always
140 # 100KHz. The UNKNOWN, FAST, and FASTEST rates all map to the
145 u_char speed;
/freebsd/sys/dev/ixgbe/
H A Dixgbe_api.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
61 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
63 * @map: pointer to u8 arr for returning map
65 * Read the rtrup2tc HW register and resolve its content into map
67 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map) in ixgbe_dcb_get_rtrup2tc() argument
69 if (hw->mac.ops.get_rtrup2tc) in ixgbe_dcb_get_rtrup2tc()
70 hw->mac.ops.get_rtrup2tc(hw, map); in ixgbe_dcb_get_rtrup2tc()
74 * ixgbe_init_shared_code - Initialize the shared code
96 switch (hw->mac.type) { in ixgbe_init_shared_code()
[all …]
/freebsd/sys/dts/arm/
H A Ddb78460.dts3 * Copyright (c) 2010-2011 Semihalf
27 * Marvell DB-78460 Device Tree Source.
30 /dts-v1/;
33 model = "mrvl,DB-78460";
34 #address-cells = <1>;
35 #size-cells = <1>;
42 #address-cells = <1>;
43 #size-cells = <0>;
49 d-cache-line-size = <32>; // 32 bytes
50 i-cache-line-size = <32>; // 32 bytes
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Dkirkwood-synology.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 pinctrl: pin-controller@10000 {
13 pmx_alarmled_12: pmx-alarmled-12 {
18 pmx_fanctrl_15: pmx-fanctrl-15 {
23 pmx_fanctrl_16: pmx-fanctrl-16 {
28 pmx_fanctrl_17: pmx-fanctrl-17 {
33 pmx_fanalarm_18: pmx-fanalarm-18 {
38 pmx_hddled_20: pmx-hddled-20 {
43 pmx_hddled_21: pmx-hddled-21 {
48 pmx_hddled_22: pmx-hddled-22 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-extra.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "rk3588-base.dtsi"
7 #include "rk3588-extra-pinctrl.dtsi"
11 compatible = "rockchip,rk3588-dwc3", "snps,dwc3";
16 clock-names = "ref_clk", "suspend_clk", "bus_clk";
19 phy-names = "usb2-phy", "usb3-phy";
21 power-domains = <&power RK3588_PD_USB>;
24 snps,dis-u2-freeclk-exists-quirk;
25 snps,dis-del-phy-power-chg-quirk;
26 snps,dis-tx-ipgap-linecheck-quirk;
[all …]

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