xref: /freebsd/sys/contrib/device-tree/src/powerpc/rainier.dts (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)

/*
 * Device Tree Source for AMCC Rainier
 *
 * Based on Sequoia code
 * Copyright (c) 2007 MontaVista Software, Inc.
 *
 * FIXME: Draft only!
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without
 * any warranty of any kind, whether express or implied.
 *
 */

/dts-v1/;

/ {
	#address-cells = <2>;
	#size-cells = <1>;
	model = "amcc,rainier";
	compatible = "amcc,rainier";
	dcr-parent = <&{/cpus/cpu@0}>;

	aliases {
		ethernet0 = &EMAC0;
		ethernet1 = &EMAC1;
		serial0 = &UART0;
		serial1 = &UART1;
		serial2 = &UART2;
		serial3 = &UART3;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			model = "PowerPC,440GRx";
			reg = <0x00000000>;
			clock-frequency = <0>; /* Filled in by zImage */
			timebase-frequency = <0>; /* Filled in by zImage */
			i-cache-line-size = <32>;
			d-cache-line-size = <32>;
			i-cache-size = <32768>;
			d-cache-size = <32768>;
			dcr-controller;
			dcr-access-method = "native";
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
	};

	UIC0: interrupt-controller0 {
		compatible = "ibm,uic-440grx","ibm,uic";
		interrupt-controller;
		cell-index = <0>;
		dcr-reg = <0x0c0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
	};

	UIC1: interrupt-controller1 {
		compatible = "ibm,uic-440grx","ibm,uic";
		interrupt-controller;
		cell-index = <1>;
		dcr-reg = <0x0d0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	UIC2: interrupt-controller2 {
		compatible = "ibm,uic-440grx","ibm,uic";
		interrupt-controller;
		cell-index = <2>;
		dcr-reg = <0x0e0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	SDR0: sdr {
		compatible = "ibm,sdr-440grx", "ibm,sdr-440ep";
		dcr-reg = <0x00e 0x002>;
	};

	CPR0: cpr {
		compatible = "ibm,cpr-440grx", "ibm,cpr-440ep";
		dcr-reg = <0x00c 0x002>;
	};

	plb {
		compatible = "ibm,plb-440grx", "ibm,plb4";
		#address-cells = <2>;
		#size-cells = <1>;
		ranges;
		clock-frequency = <0>; /* Filled in by zImage */

		SDRAM0: sdram {
			compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali";
			dcr-reg = <0x010 0x002>;
		};

		DMA0: dma {
			compatible = "ibm,dma-440grx", "ibm,dma-4xx";
			dcr-reg = <0x100 0x027>;
		};

		MAL0: mcmal {
			compatible = "ibm,mcmal-440grx", "ibm,mcmal2";
			dcr-reg = <0x180 0x062>;
			num-tx-chans = <2>;
			num-rx-chans = <2>;
			interrupt-parent = <&MAL0>;
			interrupts = <0x0 0x1 0x2 0x3 0x4>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
					/*RXEOB*/ 0x1 &UIC0 0xb 0x4
					/*SERR*/  0x2 &UIC1 0x0 0x4
					/*TXDE*/  0x3 &UIC1 0x1 0x4
					/*RXDE*/  0x4 &UIC1 0x2 0x4>;
			interrupt-map-mask = <0xffffffff>;
		};

		POB0: opb {
		  	compatible = "ibm,opb-440grx", "ibm,opb";
			#address-cells = <1>;
			#size-cells = <1>;
		  	ranges = <0x00000000 0x00000001 0x00000000 0x80000000
			          0x80000000 0x00000001 0x80000000 0x80000000>;
		  	interrupt-parent = <&UIC1>;
		  	interrupts = <0x7 0x4>;
		  	clock-frequency = <0>; /* Filled in by zImage */

			EBC0: ebc {
				compatible = "ibm,ebc-440grx", "ibm,ebc";
				dcr-reg = <0x012 0x002>;
				#address-cells = <2>;
				#size-cells = <1>;
				clock-frequency = <0>; /* Filled in by zImage */
				interrupts = <0x5 0x1>;
				interrupt-parent = <&UIC1>;

				nor_flash@0,0 {
					compatible = "amd,s29gl256n", "cfi-flash";
					bank-width = <2>;
					reg = <0x00000000 0x00000000 0x04000000>;
					#address-cells = <1>;
					#size-cells = <1>;
					partition@0 {
						label = "Kernel";
						reg = <0x00000000 0x00180000>;
					};
					partition@180000 {
						label = "ramdisk";
						reg = <0x00180000 0x00200000>;
					};
					partition@380000 {
						label = "file system";
						reg = <0x00380000 0x03aa0000>;
					};
					partition@3e20000 {
						label = "kozio";
						reg = <0x03e20000 0x00140000>;
					};
					partition@3f60000 {
						label = "env";
						reg = <0x03f60000 0x00040000>;
					};
					partition@3fa0000 {
						label = "u-boot";
						reg = <0x03fa0000 0x00060000>;
					};
				};

			};

			UART0: serial@ef600300 {
		   		device_type = "serial";
		   		compatible = "ns16550";
		   		reg = <0xef600300 0x00000008>;
		   		virtual-reg = <0xef600300>;
		   		clock-frequency = <0>; /* Filled in by zImage */
		   		current-speed = <115200>;
		   		interrupt-parent = <&UIC0>;
		   		interrupts = <0x0 0x4>;
	   		};

			UART1: serial@ef600400 {
		   		device_type = "serial";
		   		compatible = "ns16550";
		   		reg = <0xef600400 0x00000008>;
		   		virtual-reg = <0xef600400>;
		   		clock-frequency = <0>;
		   		current-speed = <0>;
		   		interrupt-parent = <&UIC0>;
		   		interrupts = <0x1 0x4>;
	   		};

			UART2: serial@ef600500 {
		   		device_type = "serial";
		   		compatible = "ns16550";
		   		reg = <0xef600500 0x00000008>;
		   		virtual-reg = <0xef600500>;
		   		clock-frequency = <0>;
		   		current-speed = <0>;
		   		interrupt-parent = <&UIC1>;
		   		interrupts = <0x3 0x4>;
	   		};

			UART3: serial@ef600600 {
		   		device_type = "serial";
		   		compatible = "ns16550";
		   		reg = <0xef600600 0x00000008>;
		   		virtual-reg = <0xef600600>;
		   		clock-frequency = <0>;
		   		current-speed = <0>;
		   		interrupt-parent = <&UIC1>;
		   		interrupts = <0x4 0x4>;
	   		};

			IIC0: i2c@ef600700 {
				compatible = "ibm,iic-440grx", "ibm,iic";
				reg = <0xef600700 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x2 0x4>;
			};

			IIC1: i2c@ef600800 {
				compatible = "ibm,iic-440grx", "ibm,iic";
				reg = <0xef600800 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x7 0x4>;
			};

			ZMII0: emac-zmii@ef600d00 {
				compatible = "ibm,zmii-440grx", "ibm,zmii";
				reg = <0xef600d00 0x0000000c>;
			};

			RGMII0: emac-rgmii@ef601000 {
				compatible = "ibm,rgmii-440grx", "ibm,rgmii";
				reg = <0xef601000 0x00000008>;
				has-mdio;
			};

			EMAC0: ethernet@ef600e00 {
				device_type = "network";
				compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
				interrupt-parent = <&EMAC0>;
				interrupts = <0x0 0x1>;
				#interrupt-cells = <1>;
				#address-cells = <0>;
				#size-cells = <0>;
				interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
						/*Wake*/  0x1 &UIC1 0x1d 0x4>;
				reg = <0xef600e00 0x00000074>;
				local-mac-address = [000000000000];
				mal-device = <&MAL0>;
				mal-tx-channel = <0>;
				mal-rx-channel = <0>;
				cell-index = <0>;
				max-frame-size = <9000>;
				rx-fifo-size = <4096>;
				tx-fifo-size = <2048>;
				phy-mode = "rgmii";
				phy-map = <0x00000000>;
				zmii-device = <&ZMII0>;
				zmii-channel = <0>;
				rgmii-device = <&RGMII0>;
				rgmii-channel = <0>;
				has-inverted-stacr-oc;
				has-new-stacr-staopc;
			};

			EMAC1: ethernet@ef600f00 {
				device_type = "network";
				compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
				interrupt-parent = <&EMAC1>;
				interrupts = <0x0 0x1>;
				#interrupt-cells = <1>;
				#address-cells = <0>;
				#size-cells = <0>;
				interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
						/*Wake*/  0x1 &UIC1 0x1f 0x4>;
				reg = <0xef600f00 0x00000074>;
				local-mac-address = [000000000000];
				mal-device = <&MAL0>;
				mal-tx-channel = <1>;
				mal-rx-channel = <1>;
				cell-index = <1>;
				max-frame-size = <9000>;
				rx-fifo-size = <4096>;
				tx-fifo-size = <2048>;
				phy-mode = "rgmii";
				phy-map = <0x00000000>;
				zmii-device = <&ZMII0>;
				zmii-channel = <1>;
				rgmii-device = <&RGMII0>;
				rgmii-channel = <1>;
				has-inverted-stacr-oc;
				has-new-stacr-staopc;
			};
		};

		PCI0: pci@1ec000000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
			primary;
			reg = <0x00000001 0xeec00000 0x00000008	/* Config space access */
			       0x00000001 0xeed00000 0x00000004	/* IACK */
			       0x00000001 0xeed00000 0x00000004	/* Special cycle */
			       0x00000001 0xef400000 0x00000040>;	/* Internal registers */

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed. Chip supports a second
			 * IO range but we don't use it for now
			 */
			ranges = <0x02000000 0x0 0x80000000 0x1 0x80000000 0x0 0x40000000
				0x01000000 0x0 0x00000000 0x1 0xe8000000 0x0 0x00010000
				0x01000000 0x0 0x00000000 0x1 0xe8800000 0x0 0x03800000>;

			/* Inbound 2GB range starting at 0 */
			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;

			/* All PCI interrupts are routed to IRQ 67 */
			interrupt-map-mask = <0x0 0x0 0x0 0x0>;
			interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
		};
	};

	chosen {
		stdout-path = "/plb/opb/serial@ef600300";
		bootargs = "console=ttyS0,115200";
	};
};