1098ca2bdSWarner Losh#- 2c3e2dc6bSNicolas Souchu# Copyright (c) 1998 Nicolas Souchu 3c3e2dc6bSNicolas Souchu# All rights reserved. 4c3e2dc6bSNicolas Souchu# 5c3e2dc6bSNicolas Souchu# Redistribution and use in source and binary forms, with or without 6c3e2dc6bSNicolas Souchu# modification, are permitted provided that the following conditions 7c3e2dc6bSNicolas Souchu# are met: 8c3e2dc6bSNicolas Souchu# 1. Redistributions of source code must retain the above copyright 9c3e2dc6bSNicolas Souchu# notice, this list of conditions and the following disclaimer. 10c3e2dc6bSNicolas Souchu# 2. Redistributions in binary form must reproduce the above copyright 11c3e2dc6bSNicolas Souchu# notice, this list of conditions and the following disclaimer in the 12c3e2dc6bSNicolas Souchu# documentation and/or other materials provided with the distribution. 13c3e2dc6bSNicolas Souchu# 14c3e2dc6bSNicolas Souchu# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15c3e2dc6bSNicolas Souchu# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16c3e2dc6bSNicolas Souchu# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17c3e2dc6bSNicolas Souchu# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18c3e2dc6bSNicolas Souchu# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19c3e2dc6bSNicolas Souchu# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20c3e2dc6bSNicolas Souchu# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21c3e2dc6bSNicolas Souchu# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22c3e2dc6bSNicolas Souchu# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23c3e2dc6bSNicolas Souchu# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24c3e2dc6bSNicolas Souchu# SUCH DAMAGE. 25c3e2dc6bSNicolas Souchu# 26c3e2dc6bSNicolas Souchu# 27c3e2dc6bSNicolas Souchu 28f7b77691SDoug Rabson#include <sys/bus.h> 29efce3748SRui Paulo#include <dev/iicbus/iic.h> 30f7b77691SDoug Rabson 317a8ecb9eSNicolas SouchuINTERFACE iicbus; 32c3e2dc6bSNicolas Souchu 33844aff82SIan LeporeCODE { 34*813c1b27SIan Lepore static int iicbus_nosupport(void) 35*813c1b27SIan Lepore { 36*813c1b27SIan Lepore 37*813c1b27SIan Lepore return (ENODEV); 38*813c1b27SIan Lepore } 39*813c1b27SIan Lepore 40844aff82SIan Lepore static u_int 41844aff82SIan Lepore iicbus_default_frequency(device_t bus, u_char speed) 42844aff82SIan Lepore { 43844aff82SIan Lepore 44844aff82SIan Lepore return (100000); 45844aff82SIan Lepore } 46844aff82SIan Lepore}; 47844aff82SIan Lepore 48c3e2dc6bSNicolas Souchu# 4904f89a63SNicolas Souchu# Interpret interrupt 50c3e2dc6bSNicolas Souchu# 51c3e2dc6bSNicolas SouchuMETHOD int intr { 52c3e2dc6bSNicolas Souchu device_t dev; 53c3e2dc6bSNicolas Souchu int event; 54c3e2dc6bSNicolas Souchu char *buf; 55c3e2dc6bSNicolas Souchu}; 56c3e2dc6bSNicolas Souchu 57c3e2dc6bSNicolas Souchu# 5804f89a63SNicolas Souchu# iicbus callback 590afebee2SJason A. Harmening# Request ownership of bus 600afebee2SJason A. Harmening# index: IIC_REQUEST_BUS or IIC_RELEASE_BUS 610afebee2SJason A. Harmening# data: pointer to int containing IIC_WAIT or IIC_DONTWAIT and either IIC_INTR or IIC_NOINTR 620afebee2SJason A. Harmening# This function is allowed to sleep if *data contains IIC_WAIT. 6304f89a63SNicolas Souchu# 6404f89a63SNicolas SouchuMETHOD int callback { 6504f89a63SNicolas Souchu device_t dev; 6604f89a63SNicolas Souchu int index; 6704f89a63SNicolas Souchu caddr_t data; 6804f89a63SNicolas Souchu}; 6904f89a63SNicolas Souchu 7004f89a63SNicolas Souchu# 71c3e2dc6bSNicolas Souchu# Send REPEATED_START condition 72c3e2dc6bSNicolas Souchu# 73c3e2dc6bSNicolas SouchuMETHOD int repeated_start { 74c3e2dc6bSNicolas Souchu device_t dev; 75c3e2dc6bSNicolas Souchu u_char slave; 7604f89a63SNicolas Souchu int timeout; 77*813c1b27SIan Lepore} DEFAULT iicbus_nosupport; 78c3e2dc6bSNicolas Souchu 79c3e2dc6bSNicolas Souchu# 80c3e2dc6bSNicolas Souchu# Send START condition 81c3e2dc6bSNicolas Souchu# 82c3e2dc6bSNicolas SouchuMETHOD int start { 83c3e2dc6bSNicolas Souchu device_t dev; 84c3e2dc6bSNicolas Souchu u_char slave; 8504f89a63SNicolas Souchu int timeout; 86*813c1b27SIan Lepore} DEFAULT iicbus_nosupport; 87c3e2dc6bSNicolas Souchu 88c3e2dc6bSNicolas Souchu# 89c3e2dc6bSNicolas Souchu# Send STOP condition 90c3e2dc6bSNicolas Souchu# 91c3e2dc6bSNicolas SouchuMETHOD int stop { 92c3e2dc6bSNicolas Souchu device_t dev; 93*813c1b27SIan Lepore} DEFAULT iicbus_nosupport; 94c3e2dc6bSNicolas Souchu 95c3e2dc6bSNicolas Souchu# 96c3e2dc6bSNicolas Souchu# Read from I2C bus 97c3e2dc6bSNicolas Souchu# 98c3e2dc6bSNicolas SouchuMETHOD int read { 99c3e2dc6bSNicolas Souchu device_t dev; 100c3e2dc6bSNicolas Souchu char *buf; 101c3e2dc6bSNicolas Souchu int len; 102c3e2dc6bSNicolas Souchu int *bytes; 10304f89a63SNicolas Souchu int last; 10404f89a63SNicolas Souchu int delay; 105*813c1b27SIan Lepore} DEFAULT iicbus_nosupport; 106c3e2dc6bSNicolas Souchu 107c3e2dc6bSNicolas Souchu# 108c3e2dc6bSNicolas Souchu# Write to the I2C bus 109c3e2dc6bSNicolas Souchu# 110c3e2dc6bSNicolas SouchuMETHOD int write { 111c3e2dc6bSNicolas Souchu device_t dev; 11207defc61SWarner Losh const char *buf; 113c3e2dc6bSNicolas Souchu int len; 114c3e2dc6bSNicolas Souchu int *bytes; 11504f89a63SNicolas Souchu int timeout; 116*813c1b27SIan Lepore} DEFAULT iicbus_nosupport; 117c3e2dc6bSNicolas Souchu 118c3e2dc6bSNicolas Souchu# 119c3e2dc6bSNicolas Souchu# Reset I2C bus 120c3e2dc6bSNicolas Souchu# 121c3e2dc6bSNicolas SouchuMETHOD int reset { 122c3e2dc6bSNicolas Souchu device_t dev; 123c3e2dc6bSNicolas Souchu u_char speed; 12404f89a63SNicolas Souchu u_char addr; 12504f89a63SNicolas Souchu u_char *oldaddr; 126c3e2dc6bSNicolas Souchu}; 127d7fac973SWarner Losh 128d7fac973SWarner Losh# 129d7fac973SWarner Losh# Generalized Read/Write interface 130d7fac973SWarner Losh# 131d7fac973SWarner LoshMETHOD int transfer { 132d7fac973SWarner Losh device_t dev; 133d7fac973SWarner Losh struct iic_msg *msgs; 134d7fac973SWarner Losh uint32_t nmsgs; 135d7fac973SWarner Losh}; 136844aff82SIan Lepore 137844aff82SIan Lepore# 138844aff82SIan Lepore# Return the frequency in Hz for the bus running at the given 139844aff82SIan Lepore# symbolic speed. Only the IIC_SLOW speed has meaning, it is always 140844aff82SIan Lepore# 100KHz. The UNKNOWN, FAST, and FASTEST rates all map to the 141844aff82SIan Lepore# configured bus frequency, or 100KHz when not otherwise configured. 142844aff82SIan Lepore# 143844aff82SIan LeporeMETHOD u_int get_frequency { 144844aff82SIan Lepore device_t dev; 145844aff82SIan Lepore u_char speed; 146844aff82SIan Lepore} DEFAULT iicbus_default_frequency; 147