Searched +full:sparx5 +full:- +full:sgpio +full:- +full:bank (Results 1 – 6 of 6) sorted by relevance
/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | microchip,sparx5-sgpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/microchip,sparx5-sgpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lars Povlsen <lars.povlsen@microchip.com> 21 pattern: "^gpio@[0-9a-f]+$" 25 - microchip,sparx5-sgpio 26 - mscc,ocelot-sgpio 27 - mscc,luton-sgpio 29 "#address-cells": [all …]
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/linux/arch/arm64/boot/dts/microchip/ |
H A D | sparx5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/clock/microchip,sparx5.h> 11 compatible = "microchip,sparx5"; 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <1>; 23 stdout-path = "serial0:115200n8"; 27 #address-cells = <1>; [all …]
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/linux/Documentation/devicetree/bindings/mfd/ |
H A D | mscc,ocelot.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Ocelot Externally-Controlled Ethernet Switch 10 - Colin Foster <colin.foster@in-advantage.com> 18 The switch family is a multi-port networking switch that supports many 25 - mscc,vsc7512 30 "#address-cells": 33 "#size-cells": 36 spi-max-frequency: [all …]
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/linux/drivers/pinctrl/ |
H A D | pinctrl-microchip-sgpio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 138 addr->port = pin / priv->bitcount; in sgpio_pin_to_addr() 139 addr->bit = pin % priv->bitcount; in sgpio_pin_to_addr() 144 return bit + port * priv->bitcount; in sgpio_addr_to_pin() 149 return (priv->properties->regoff[rno] + off) * in sgpio_get_addr() 150 regmap_get_reg_stride(priv->regs); in sgpio_get_addr() 159 ret = regmap_read(priv->regs, addr, &val); in sgpio_readl() 160 WARN_ONCE(ret, "error reading sgpio reg %d\n", ret); in sgpio_readl() 171 ret = regmap_write(priv->regs, addr, val); in sgpio_writel() 172 WARN_ONCE(ret, "error writing sgpio reg %d\n", ret); in sgpio_writel() [all …]
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/linux/arch/arm/boot/dts/microchip/ |
H A D | lan966x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * lan966x.dtsi - Device Tree Include file for Microchip LAN966 family SoC 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/mfd/atmel-flexcom.h> 14 #include <dt-bindings/dma/at91.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/clock/microchip,lan966x.h> 21 interrupt-parent = <&gic>; 22 #address-cells = <1>; [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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