Home
last modified time | relevance | path

Searched full:sdhi0 (Results 1 – 25 of 80) sorted by relevance

1234

/linux/arch/arm64/boot/dts/renesas/
H A Drzv2-evk-cn15-sd.dtso20 vqmmc_sdhi0: regulator-vqmmc-sdhi0 {
22 regulator-name = "SDHI0 VqmmC";
33 sdhi0-pwr-en-hog {
60 &sdhi0 {
H A Dr8a774c0-cat874.dts20 mmc0 = &sdhi0;
96 vcc_sdhi0: regulator-vcc-sdhi0 {
99 regulator-name = "SDHI0 Vcc";
106 vccq_sdhi0: regulator-vccq-sdhi0 {
109 regulator-name = "SDHI0 VccQ";
321 function = "sdhi0";
327 function = "sdhi0";
386 &sdhi0 {
H A Dhihope-common.dtsi24 mmc1 = &sdhi0;
101 vccq_sdhi0: regulator-vccq-sdhi0 {
104 regulator-name = "SDHI0 VccQ";
239 function = "sdhi0";
245 function = "sdhi0";
301 &sdhi0 {
H A Drzt2h-n2h-evk-common.dtsi20 mmc0 = &sdhi0;
48 vqmmc_sdhi0: regulator-vqmmc-sdhi0 {
50 regulator-name = "SDHI0 VqmmC";
260 sdhi0-emmc-iovs-hog {
288 sdhi0-pwen-hog {
343 &sdhi0 {
358 &sdhi0 {
H A Drzg3s-smarc-som.dtsi19 mmc0 = &sdhi0;
36 regulator-name = "SDHI0 Vcc";
45 regulator-name = "SDHI0 VccQ";
178 &sdhi0 {
192 &sdhi0 {
H A Dr8a774b1-beacon-rzg2n-kit.dts34 mmc1 = &sdhi0;
H A Dr8a774a1-beacon-rzg2m-kit.dts33 mmc1 = &sdhi0;
H A Dr8a774e1-beacon-rzg2h-kit.dts34 mmc1 = &sdhi0;
H A Drzv2-evk-cn15-emmc.dtso39 &sdhi0 {
H A Dr9a07g044l2-remi-pi.dts29 mmc0 = &sdhi0;
323 &sdhi0 {
/linux/arch/arm/boot/dts/renesas/
H A Dr8a7792-wheat.dts69 vcc_sdhi0: regulator-vcc-sdhi0 {
72 regulator-name = "SDHI0 Vcc";
157 sdhi0_pins: sdhi0 {
159 function = "sdhi0";
205 &sdhi0 {
H A Dr8a7792-blanche.dts173 vcc_sdhi0: regulator-vcc-sdhi0 {
176 regulator-name = "SDHI0 Vcc";
265 sdhi0_pins: sdhi0 {
267 function = "sdhi0";
323 &sdhi0 {
H A Dr7s72100-genmai.dts70 /* Needs SDHI0 to be disabled */
264 sdhi0_pins: sdhi0 {
265 /* SDHI0: P4_8 up to P4_15 */
292 &sdhi0 {
H A Dsh73a0-kzm9g.dts63 vmmc_sdhi0: regulator-vmmc-sdhi0 {
65 regulator-name = "SDHI0 Vcc";
352 function = "sdhi0";
375 &sdhi0 {
H A Dr8a7743-iwg20m.dtsi51 function = "sdhi0";
87 &sdhi0 {
H A Dr8a7744-iwg20m.dtsi46 function = "sdhi0";
82 &sdhi0 {
/linux/arch/sh/kernel/cpu/sh2a/
H A Dsetup-sh7269.c45 SDHI0, SDHI1, enumerator
175 INTC_IRQ(SDHI0, 332), INTC_IRQ(SDHI0, 333),
176 INTC_IRQ(SDHI0, 334),
235 { 0xfffe0c26, 0, 16, 4, /* IPR25 */ { SDHI0, SDHI1, RTC, 0 } },
H A Dclock-sh7264.c98 [MSTP34] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 4, 0), /* SDHI0 */
127 CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP34]),
/linux/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7723.c470 SDHI1, RTC, DMAC1B, SDHI0, enumerator
534 INTC_VECT(SDHI0, 0xE80),
535 INTC_VECT(SDHI0, 0xEA0),
536 INTC_VECT(SDHI0, 0xEC0),
620 { 0xa4080028, 0, 16, 4, /* IPRK */ { RTC,DMAC1B,0,SDHI0 } },
H A Dsetup-sh7724.c895 DMAC1B, DMAC0B, I2C0, I2C1, SDHI0, SDHI1, SPU, MMCIF, enumerator
968 INTC_VECT(SDHI0, 0xE80),
969 INTC_VECT(SDHI0, 0xEA0),
970 INTC_VECT(SDHI0, 0xEC0),
971 INTC_VECT(SDHI0, 0xEE0),
1072 { 0xa4080028, 0, 16, 4, /* IPRK */ { RTC, DMAC1B, 0, SDHI0 } },
H A Dsetup-sh7734.c321 SDHI0, SDHI1, enumerator
405 INTC_VECT(SDHI0, 0xAE0),
437 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2),
H A Dclock-sh7734.c105 MSTP323, /* SDHI0 */
219 CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP323]),
/linux/arch/sh/boards/mach-ap325rxa/
H A Dsetup.c307 /* Fixed 3.3V regulators to be used by SDHI0, SDHI1 */
318 .name = "SDHI0",
335 .id = 0, /* "sdhi0" clock */
502 /* SDHI0 - CN3 - SD CARD */ in ap325rxa_devices_setup()
/linux/arch/sh/include/cpu-sh4/cpu/
H A Dsh7723.h169 /* SDHI0 (PTD) */
175 /* SDHI0 (PTS) */
/linux/arch/sh/boards/mach-kfr2r09/
H A Dsetup.c301 /* Fixed 3.3V regulator to be used by SDHI0 */
310 .name = "SDHI0",
571 /* SDHI0 connected to yc304 */ in kfr2r09_devices_setup()

1234