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12

/linux/Documentation/devicetree/bindings/input/
H A Diqs626a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
19 - $ref: touchscreen/touchscreen.yaml#
31 "#address-cells":
34 "#size-cells":
37 azoteq,suspend-mode:
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H A Dazoteq,iqs7222.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
21 - azoteq,iqs7222a
22 - azoteq,iqs7222b
23 - azoteq,iqs7222c
24 - azoteq,iqs7222d
29 irq-gpios:
32 Specifies the GPIO connected to the device's active-low RDY output.
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H A Diqs269a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 - $ref: input.yaml#
16 The Azoteq IQS269A is an 8-channel capacitive touch controller that features
17 additional Hall-effect and inductive sensing capabilities.
24 - azoteq,iqs269a
25 - azoteq,iqs269a-00
26 - azoteq,iqs269a-d0
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/linux/drivers/clk/
H A Dclk-si514.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/clk-provider.h>
55 u32 m_frac; /* 29-bit Fractional part of multiplier M */
64 return regmap_update_bits(data->regmap, SI514_REG_CONTROL, in si514_enable_output()
88 err = regmap_read(data->regmap, SI514_REG_CONTROL, &val); in si514_is_prepared()
102 err = regmap_bulk_read(data->regmap, SI514_REG_M_FRAC1, in si514_get_muldiv()
107 settings->m_frac = reg[0] | reg[1] << 8 | reg[2] << 16 | in si514_get_muldiv()
109 settings->m_int = (reg[4] & 0x3f) << 3 | reg[3] >> 5; in si514_get_muldiv()
110 settings->ls_div_bits = (reg[6] >> 4) & 0x07; in si514_get_muldiv()
111 settings->hs_div = (reg[6] & 0x03) << 8 | reg[5]; in si514_get_muldiv()
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/linux/drivers/scsi/
H A Dmesh.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SCSI low-level driver for the MESH (Macintosh Enhanced SCSI Hardware)
5 * We assume the MESH is connected to a DBDMA (descriptor-based DMA)
11 * Apr. 21 2002 - BenH Rework bus reset code for new error handler
15 * Sep. 27 2003 - BenH Move to new driver model, fix some write posting
18 * - handle aborts correctly
19 * - retry arbitration if lost (unless higher levels do this for us)
20 * - power down the chip when no device is detected
68 MODULE_PARM_DESC(sync_rate, "Synchronous rate (0..10, 0=async)");
85 #define DEBUG_TARGET(cmd) ((cmd) && ALLOW_DEBUG((cmd)->device->id))
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H A Dncr53c8xx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 ** Device driver for the PCI-SCSI NCR538XX controller family.
8 **-----------------------------------------------------------------------------
22 ** Stefan Esser <se@mi.Uni-Koeln.de>
27 **-----------------------------------------------------------------------------
38 ** Support for Fast-20 scsi.
42 ** Support for Fast-40 scsi.
43 ** Support for on-Board RAM.
46 ** Full support for scsi scripts instructions pre-fetching.
57 ** Low PCI traffic for command handling when on-chip RAM is present.
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/linux/drivers/net/ieee802154/
H A Dadf7242.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Analog Devices ADF7242 Low-Power IEEE 802.15.4 Transceiver
5 * Copyright 2009-2017 Analog Devices Inc.
48 #define REG_CH_FREQ0 0x300 /* RW Channel Frequency Settings - Low */
49 #define REG_CH_FREQ1 0x301 /* RW Channel Frequency Settings - Middle */
50 #define REG_CH_FREQ2 0x302 /* RW Channel Frequency Settings - High */
57 #define REG_DR0 0x30E /* RW bits [15:8] of [15:0] data rate setting */
58 #define REG_DR1 0x30F /* RW bits [7:0] of [15:0] data rate setting */
62 #define REG_TMR_CFG0 0x316 /* RW Wake up Timer Conf Register - High */
63 #define REG_TMR_CFG1 0x317 /* RW Wake up Timer Conf Register - Low */
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/linux/drivers/input/misc/
H A Diqs626a.c1 // SPDX-License-Identifier: GPL-2.0+
8 * inductive keys as well as Hall-effect switches, and one for a trackpad that
227 .name = "event-prox",
233 .name = "event-prox-alt",
240 .name = "event-touch",
246 .name = "event-touch-alt",
253 .name = "event-deep",
259 .name = "event-deep-alt",
367 .name = "ulp-0",
378 .name = "trackpad-3x2",
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H A Diqs269a.c1 // SPDX-License-Identifier: GPL-2.0+
8 * inductive keys as well as Hall-effect switches, and one for each of the two
225 .name = "event-prox",
231 .name = "event-prox-alt",
238 .name = "event-touch",
244 .name = "event-touch-alt",
251 .name = "event-deep",
257 .name = "event-deep-alt",
339 * Slider 1 is unavailable if the touch-and-hold option is enabled via in iqs269_slider_type()
341 * the touch-and-hold timer ceiling. in iqs269_slider_type()
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H A Diqs7222.c1 // SPDX-License-Identifier: GPL-2.0-or-later
116 [IQS7222_REG_GRP_CYCLE] = "cycle-%d",
117 [IQS7222_REG_GRP_CHAN] = "channel-%d",
118 [IQS7222_REG_GRP_SLDR] = "slider-%d",
120 [IQS7222_REG_GRP_GPIO] = "gpio-%d",
150 .name = "event-prox",
155 .name = "event-touch",
162 { .name = "event-press", },
164 .name = "event-tap",
171 .name = "event-swipe-pos",
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/linux/Documentation/scsi/
H A Daic79xx.rst1 .. SPDX-License-Identifier: GPL-2.0
28 AIC-7901A Single Channel 64-bit PCI-X 133MHz to
30 AIC-7901B Single Channel 64-bit PCI-X 133MHz to
32 AIC-7902A4 Dual Channel 64-bit PCI-X 133MHz to
34 AIC-7902B Dual Channel 64-bit PCI-X 133MHz to
41 Adaptec SCSI Card 39320 Dual Channel 64-bit PCI-X 133MHz to 7902A4/7902B
43 68-pin, two internal 68-pin)
44 Adaptec SCSI Card 39320A Dual Channel 64-bit PCI-X 133MHz to 7902B
46 68-pin, two internal 68-pin)
47 Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to 7902A4
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/linux/drivers/net/ethernet/intel/igb/
H A De1000_defines.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
62 /* Interrupt acknowledge Auto-mask */
118 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
119 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
184 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
186 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
254 /* Constants used to intrepret the masked PCI-X bus speed. */
271 /* 1000/H is not supported, nor spec-compliant. */
309 #define E1000_TCTL_RTLC 0x01000000 /* Re-transmit on late collision */
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/linux/drivers/scsi/sym53c8xx_2/
H A Dsym_hipd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * of PCI-SCSI IO processors.
6 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx>
10 * Copyright (C) 1998-2000 Gerard Roudier
13 * a port of the FreeBSD ncr driver to Linux-1.2.13.
17 * Stefan Esser <se@mi.Uni-Koeln.de>
25 *-----------------------------------------------------------------------------
55 while (n-- > 0) in sym_printl_hex()
62 sym_print_addr(cp->cmd, "%s: ", label); in sym_print_msg()
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/linux/drivers/gpu/drm/vc4/
H A Dvc4_dsi.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * single-lane DSI controller, while DSI1 is a more modern 4-lane DSI
16 * This driver has been tested for DSI1 video-mode display only
21 #include <linux/clk-provider.h>
25 #include <linux/dma-mapping.h>
146 * of going to LP-STOP.
149 /* Transmit blanking packet only during vblank, instead of allowing LP-STOP. */
151 /* Transmit blanking packet only during HFP, instead of allowing LP-STOP. */
153 /* Transmit blanking packet only during HBP, instead of allowing LP-STOP. */
616 struct drm_device *drm = dsi->bridge.dev; in dsi_dma_workaround_write()
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/linux/drivers/hwmon/
H A Dtmp464.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Lionel Pouliquen <lionel.lp.pouliquen@nokia.com>
24 #define TMP464_NUM_CHANNELS 5 /* chan 0 is internal, 1-4 are remote */
25 #define TMP468_NUM_CHANNELS 9 /* chan 0 is internal, 1-8 are remote */
30 #define TMP464_TEMP_OFFSET_REG(channel) (0x40 + ((channel) - 1) * 8)
31 #define TMP464_N_FACTOR_REG(channel) (0x41 + ((channel) - 1) * 8)
122 struct regmap *regmap = data->regmap; in tmp464_enable_channels()
126 for (i = 0; i < data->channels; i++) in tmp464_enable_channels()
127 if (data->channel[i].enabled) in tmp464_enable_channels()
139 *val = data->update_interval; in tmp464_chip_read()
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/linux/drivers/iio/adc/
H A Dti-ads1298.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2023 - 2024 Topic Embedded Products
89 * 2x the clock rate, this would require extra time between the command byte and
94 /* For reading and writing registers, we need a 3-byte buffer */
96 /* Outputs status word and 'n' 24-bit samples, plus the command byte */
119 * >2 = Multiple DRDY during transfer, lost rdata_xfer_busy - 2 samples
173 .tx_buf = priv->cmd_buffer, in ads1298_write_cmd()
174 .rx_buf = priv->cmd_buffer, in ads1298_write_cmd()
183 priv->cmd_buffer[0] = command; in ads1298_write_cmd()
185 return spi_sync_transfer(priv->spi, &xfer, 1); in ads1298_write_cmd()
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/linux/drivers/gpu/drm/panel/
H A Dpanel-novatek-nt35510.c1 // SPDX-License-Identifier: GPL-2.0-only
16 * per-panel, e.g. for physical size.
147 * struct nt35510_config - the display-specific NT35510 configuration
173 * +------------------------------------------->
207 * @bt1ctr: setting for boost power control for the AVDD step-up
210 * frequency for the step-up circuit:
220 * amplification for the step-up circuit:
231 * @avee: setting for AVEE ranging from 0x00 = -6.5V to 0x14 = -4.5V
232 * in 0.1V steps the default is 0x05 which means -6.0V
236 * @bt2ctr: setting for boost power control for the AVEE step-up
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/linux/drivers/media/i2c/
H A Dtc358746.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TC358746 - Parallel <-> CSI-2 Bridge
8 * - Currently only 'Parallel-in -> CSI-out' mode is supported!
13 #include <linux/clk-provider.h>
19 #include <linux/phy/phy-mipi-dphy.h>
24 #include <media/v4l2-ctrls.h>
25 #include <media/v4l2-device.h>
26 #include <media/v4l2-fwnode.h>
27 #include <media/v4l2-mc.h>
29 /* 16-bit registers */
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H A Dar0521.c1 // SPDX-License-Identifier: GPL-2.0
4 * - Przemysłowy Instytut Automatyki i Pomiarów PIAP
12 #include <media/v4l2-ctrls.h>
13 #include <media/v4l2-fwnode.h>
14 #include <media/v4l2-subdev.h>
24 /* Effective pixel sample rate on the pixel array. */
145 return &container_of(ctrl->handler, struct ar0521_dev, in ctrl_to_sd()
146 ctrls.handler)->sd; in ctrl_to_sd()
156 return div_u64(v + d - 1, d); in div64_round_up()
161 switch (sensor->fmt.code) { in ar0521_code_to_bpp()
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/linux/sound/soc/codecs/
H A Dmadera.c1 // SPDX-License-Identifier: GPL-2.0-only
5 // Copyright (C) 2015-2019 Cirrus Logic, Inc. and
19 #include <linux/irqchip/irq-madera.h>
23 #include <sound/madera-pdata.h>
25 #include <dt-bindings/sound/madera.h>
144 dev_err(_fll->madera->de
2629 int div, div_inc, rate; madera_set_outclk() local
3109 unsigned int rate = params_rate(params); madera_hw_params() local
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H A Dda7218.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * da7218.c - DA7218 ALSA SoC Codec Driver
22 #include <sound/soc-dapm.h>
37 static const DECLARE_TLV_DB_SCALE(da7218_mic_gain_tlv, -600, 600, 0);
38 static const DECLARE_TLV_DB_SCALE(da7218_mixin_gain_tlv, -450, 150, 0);
39 static const DECLARE_TLV_DB_SCALE(da7218_in_dig_gain_tlv, -8325, 75, 0);
40 static const DECLARE_TLV_DB_SCALE(da7218_ags_trigger_tlv, -9000, 600, 0);
42 static const DECLARE_TLV_DB_SCALE(da7218_alc_threshold_tlv, -9450, 150, 0);
47 static const DECLARE_TLV_DB_SCALE(da7218_dmix_gain_tlv, -4200, 150, 0);
50 static const DECLARE_TLV_DB_SCALE(da7218_dgs_trigger_tlv, -9450, 150, 0);
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/linux/drivers/net/ethernet/intel/e1000/
H A De1000_hw.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
297 #define E1000_MNG_DHCP_COMMAND_TIMEOUT 10 /* Time in ms to process MNG command */
422 /* MAC decode size is 128K - This is the size of BAR0 */
443 (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
486 * E1000_RAR_ENTRIES - 1 multicast addresses.
503 /* Receive Descriptor - Extended */
529 /* Receive Descriptor - Packet Split */
553 __le16 length[3]; /* length of buffers 1-3 */
567 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
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/linux/drivers/net/ethernet/marvell/
H A Dskge.h1 /* SPDX-License-Identifier: GPL-2.0 */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
262 CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */
263 CHIP_ID_YUKON_LP = 0xb2, /* Chip ID for YUKON-LP */
264 CHIP_ID_YUKON_XL = 0xb3, /* Chip ID for YUKON-2 XL */
265 CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */
266 CHIP_ID_YUKON_FE = 0xb7, /* Chip ID for YUKON-2 FE */
268 CHIP_REV_YU_LITE_A1 = 3, /* Chip Rev. for YUKON-Lite A1,A2 */
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/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_link.c1 /* Copyright 2008-2013 Broadcom Corporation
8 * at http://www.gnu.org/licenses/gpl-2.0.html (the "GPL").
43 #define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1)
47 /* LED Blink rate that will achieve ~15.9Hz */
205 (_phy)->def_md_devad, \
211 (_phy)->def_md_devad, \
239 * bnx2x_check_lfa - This function checks if link reinitialization is required,
251 struct bnx2x *bp = params->bp; in bnx2x_check_lfa()
254 REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
257 /* NOTE: must be first condition checked - in bnx2x_check_lfa()
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H A Dbnx2x_main.c3 * Copyright (c) 2007-2013 Broadcom Corporation
36 #include <linux/dma-mapping.h>
83 #define FW_FILE_NAME_E1 "bnx2x/bnx2x-e1-" FW_FILE_VERSION ".fw"
84 #define FW_FILE_NAME_E1H "bnx2x/bnx2x-e1h-" FW_FILE_VERSION ".fw"
85 #define FW_FILE_NAME_E2 "bnx2x/bnx2x-e2-" FW_FILE_VERSION ".fw"
86 #define FW_FILE_NAME_E1_V15 "bnx2x/bnx2x-e1-" FW_FILE_VERSION_V15 ".fw"
87 #define FW_FILE_NAME_E1H_V15 "bnx2x/bnx2x-e1h-" FW_FILE_VERSION_V15 ".fw"
88 #define FW_FILE_NAME_E2_V15 "bnx2x/bnx2x-e2-" FW_FILE_VERSION_V15 ".fw"
117 MODULE_PARM_DESC(int_mode, " Force interrupt mode other than MSI-X "
124 static int mrrs = -1;
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