xref: /linux/drivers/hwmon/tmp464.c (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
1007e433cSGuenter Roeck // SPDX-License-Identifier: GPL-2.0-or-later
2007e433cSGuenter Roeck 
3007e433cSGuenter Roeck /* Driver for the Texas Instruments TMP464 SMBus temperature sensor IC.
4007e433cSGuenter Roeck  * Supported models: TMP464, TMP468
5007e433cSGuenter Roeck 
6007e433cSGuenter Roeck  * Copyright (C) 2022 Agathe Porte <agathe.porte@nokia.com>
7007e433cSGuenter Roeck  * Preliminary support by:
8007e433cSGuenter Roeck  * Lionel Pouliquen <lionel.lp.pouliquen@nokia.com>
9007e433cSGuenter Roeck  */
10007e433cSGuenter Roeck 
11007e433cSGuenter Roeck #include <linux/err.h>
12007e433cSGuenter Roeck #include <linux/hwmon.h>
13007e433cSGuenter Roeck #include <linux/i2c.h>
14007e433cSGuenter Roeck #include <linux/init.h>
15007e433cSGuenter Roeck #include <linux/module.h>
16007e433cSGuenter Roeck #include <linux/mutex.h>
1739f03438SRob Herring #include <linux/of.h>
18007e433cSGuenter Roeck #include <linux/regmap.h>
19007e433cSGuenter Roeck #include <linux/slab.h>
20007e433cSGuenter Roeck 
21007e433cSGuenter Roeck /* Addresses to scan */
22007e433cSGuenter Roeck static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b, I2C_CLIENT_END };
23007e433cSGuenter Roeck 
24007e433cSGuenter Roeck #define TMP464_NUM_CHANNELS		5	/* chan 0 is internal, 1-4 are remote */
25007e433cSGuenter Roeck #define TMP468_NUM_CHANNELS		9	/* chan 0 is internal, 1-8 are remote */
26007e433cSGuenter Roeck 
27007e433cSGuenter Roeck #define MAX_CHANNELS			9
28007e433cSGuenter Roeck 
29007e433cSGuenter Roeck #define TMP464_TEMP_REG(channel)	(channel)
30007e433cSGuenter Roeck #define TMP464_TEMP_OFFSET_REG(channel)	(0x40 + ((channel) - 1) * 8)
31007e433cSGuenter Roeck #define TMP464_N_FACTOR_REG(channel)	(0x41 + ((channel) - 1) * 8)
32007e433cSGuenter Roeck 
33007e433cSGuenter Roeck static const u8 TMP464_THERM_LIMIT[MAX_CHANNELS] = {
34007e433cSGuenter Roeck 	0x39, 0x42, 0x4A, 0x52, 0x5A, 0x62, 0x6a, 0x72, 0x7a };
35007e433cSGuenter Roeck static const u8 TMP464_THERM2_LIMIT[MAX_CHANNELS] = {
36007e433cSGuenter Roeck 	0x3A, 0x43, 0x4B, 0x53, 0x5B, 0x63, 0x6b, 0x73, 0x7b };
37007e433cSGuenter Roeck 
38007e433cSGuenter Roeck #define TMP464_THERM_STATUS_REG			0x21
39007e433cSGuenter Roeck #define TMP464_THERM2_STATUS_REG		0x22
40007e433cSGuenter Roeck #define TMP464_REMOTE_OPEN_REG			0x23
41007e433cSGuenter Roeck #define TMP464_CONFIG_REG			0x30
42007e433cSGuenter Roeck #define TMP464_TEMP_HYST_REG			0x38
43007e433cSGuenter Roeck #define TMP464_LOCK_REG				0xc4
44007e433cSGuenter Roeck 
45007e433cSGuenter Roeck /* Identification */
46007e433cSGuenter Roeck #define TMP464_MANUFACTURER_ID_REG		0xFE
47007e433cSGuenter Roeck #define TMP464_DEVICE_ID_REG			0xFF
48007e433cSGuenter Roeck 
49007e433cSGuenter Roeck /* Flags */
50007e433cSGuenter Roeck #define TMP464_CONFIG_SHUTDOWN			BIT(5)
51007e433cSGuenter Roeck #define TMP464_CONFIG_RANGE			0x04
52007e433cSGuenter Roeck #define TMP464_CONFIG_REG_REN(x)		(BIT(7 + (x)))
53007e433cSGuenter Roeck #define TMP464_CONFIG_REG_REN_MASK		GENMASK(15, 7)
54007e433cSGuenter Roeck #define TMP464_CONFIG_CONVERSION_RATE_B0	2
55007e433cSGuenter Roeck #define TMP464_CONFIG_CONVERSION_RATE_B2	4
56007e433cSGuenter Roeck #define TMP464_CONFIG_CONVERSION_RATE_MASK      GENMASK(TMP464_CONFIG_CONVERSION_RATE_B2, \
57007e433cSGuenter Roeck 							TMP464_CONFIG_CONVERSION_RATE_B0)
58007e433cSGuenter Roeck 
59007e433cSGuenter Roeck #define TMP464_UNLOCK_VAL			0xeb19
60007e433cSGuenter Roeck #define TMP464_LOCK_VAL				0x5ca6
61007e433cSGuenter Roeck #define TMP464_LOCKED				0x8000
62007e433cSGuenter Roeck 
63007e433cSGuenter Roeck /* Manufacturer / Device ID's */
64007e433cSGuenter Roeck #define TMP464_MANUFACTURER_ID			0x5449
65007e433cSGuenter Roeck #define TMP464_DEVICE_ID			0x1468
66007e433cSGuenter Roeck #define TMP468_DEVICE_ID			0x0468
67007e433cSGuenter Roeck 
68007e433cSGuenter Roeck static const struct i2c_device_id tmp464_id[] = {
69007e433cSGuenter Roeck 	{ "tmp464", TMP464_NUM_CHANNELS },
70007e433cSGuenter Roeck 	{ "tmp468", TMP468_NUM_CHANNELS },
71007e433cSGuenter Roeck 	{ }
72007e433cSGuenter Roeck };
73007e433cSGuenter Roeck MODULE_DEVICE_TABLE(i2c, tmp464_id);
74007e433cSGuenter Roeck 
75007e433cSGuenter Roeck static const struct of_device_id __maybe_unused tmp464_of_match[] = {
76007e433cSGuenter Roeck 	{
77007e433cSGuenter Roeck 		.compatible = "ti,tmp464",
78007e433cSGuenter Roeck 		.data = (void *)TMP464_NUM_CHANNELS
79007e433cSGuenter Roeck 	},
80007e433cSGuenter Roeck 	{
81007e433cSGuenter Roeck 		.compatible = "ti,tmp468",
82007e433cSGuenter Roeck 		.data = (void *)TMP468_NUM_CHANNELS
83007e433cSGuenter Roeck 	},
84007e433cSGuenter Roeck 	{},
85007e433cSGuenter Roeck };
86007e433cSGuenter Roeck MODULE_DEVICE_TABLE(of, tmp464_of_match);
87007e433cSGuenter Roeck 
88007e433cSGuenter Roeck struct tmp464_channel {
89007e433cSGuenter Roeck 	const char *label;
90007e433cSGuenter Roeck 	bool enabled;
91007e433cSGuenter Roeck };
92007e433cSGuenter Roeck 
93007e433cSGuenter Roeck struct tmp464_data {
94007e433cSGuenter Roeck 	struct regmap *regmap;
95007e433cSGuenter Roeck 	struct mutex update_lock;
96007e433cSGuenter Roeck 	int channels;
97007e433cSGuenter Roeck 	s16 config_orig;
98007e433cSGuenter Roeck 	u16 open_reg;
99007e433cSGuenter Roeck 	unsigned long last_updated;
100007e433cSGuenter Roeck 	bool valid;
101007e433cSGuenter Roeck 	int update_interval;
102007e433cSGuenter Roeck 	struct tmp464_channel channel[MAX_CHANNELS];
103007e433cSGuenter Roeck };
104007e433cSGuenter Roeck 
temp_from_reg(s16 reg)105007e433cSGuenter Roeck static int temp_from_reg(s16 reg)
106007e433cSGuenter Roeck {
107007e433cSGuenter Roeck 	return DIV_ROUND_CLOSEST((reg >> 3) * 625, 10);
108007e433cSGuenter Roeck }
109007e433cSGuenter Roeck 
temp_to_limit_reg(long temp)110007e433cSGuenter Roeck static s16 temp_to_limit_reg(long temp)
111007e433cSGuenter Roeck {
112007e433cSGuenter Roeck 	return DIV_ROUND_CLOSEST(temp, 500) << 6;
113007e433cSGuenter Roeck }
114007e433cSGuenter Roeck 
temp_to_offset_reg(long temp)115007e433cSGuenter Roeck static s16 temp_to_offset_reg(long temp)
116007e433cSGuenter Roeck {
117007e433cSGuenter Roeck 	return DIV_ROUND_CLOSEST(temp * 10, 625) << 3;
118007e433cSGuenter Roeck }
119007e433cSGuenter Roeck 
tmp464_enable_channels(struct tmp464_data * data)120007e433cSGuenter Roeck static int tmp464_enable_channels(struct tmp464_data *data)
121007e433cSGuenter Roeck {
122007e433cSGuenter Roeck 	struct regmap *regmap = data->regmap;
123007e433cSGuenter Roeck 	u16 enable = 0;
124007e433cSGuenter Roeck 	int i;
125007e433cSGuenter Roeck 
126007e433cSGuenter Roeck 	for (i = 0; i < data->channels; i++)
127007e433cSGuenter Roeck 		if (data->channel[i].enabled)
128007e433cSGuenter Roeck 			enable |= TMP464_CONFIG_REG_REN(i);
129007e433cSGuenter Roeck 
130007e433cSGuenter Roeck 	return regmap_update_bits(regmap, TMP464_CONFIG_REG, TMP464_CONFIG_REG_REN_MASK, enable);
131007e433cSGuenter Roeck }
132007e433cSGuenter Roeck 
tmp464_chip_read(struct device * dev,u32 attr,int channel,long * val)133007e433cSGuenter Roeck static int tmp464_chip_read(struct device *dev, u32 attr, int channel, long *val)
134007e433cSGuenter Roeck {
135007e433cSGuenter Roeck 	struct tmp464_data *data = dev_get_drvdata(dev);
136007e433cSGuenter Roeck 
137007e433cSGuenter Roeck 	switch (attr) {
138007e433cSGuenter Roeck 	case hwmon_chip_update_interval:
139007e433cSGuenter Roeck 		*val = data->update_interval;
140007e433cSGuenter Roeck 		return 0;
141007e433cSGuenter Roeck 	default:
142007e433cSGuenter Roeck 		return -EOPNOTSUPP;
143007e433cSGuenter Roeck 	}
144007e433cSGuenter Roeck }
145007e433cSGuenter Roeck 
tmp464_temp_read(struct device * dev,u32 attr,int channel,long * val)146007e433cSGuenter Roeck static int tmp464_temp_read(struct device *dev, u32 attr, int channel, long *val)
147007e433cSGuenter Roeck {
148007e433cSGuenter Roeck 	struct tmp464_data *data = dev_get_drvdata(dev);
149007e433cSGuenter Roeck 	struct regmap *regmap = data->regmap;
150ad231314SGuenter Roeck 	unsigned int regs[2];
151ad231314SGuenter Roeck 	unsigned int regval;
152ad231314SGuenter Roeck 	u16 regvals[2];
153007e433cSGuenter Roeck 	int err = 0;
154007e433cSGuenter Roeck 
155007e433cSGuenter Roeck 	switch (attr) {
156007e433cSGuenter Roeck 	case hwmon_temp_max_alarm:
157007e433cSGuenter Roeck 		err = regmap_read(regmap, TMP464_THERM_STATUS_REG, &regval);
158007e433cSGuenter Roeck 		if (err < 0)
159007e433cSGuenter Roeck 			break;
160007e433cSGuenter Roeck 		*val = !!(regval & BIT(channel + 7));
161007e433cSGuenter Roeck 		break;
162007e433cSGuenter Roeck 	case hwmon_temp_crit_alarm:
163007e433cSGuenter Roeck 		err = regmap_read(regmap, TMP464_THERM2_STATUS_REG, &regval);
164007e433cSGuenter Roeck 		if (err < 0)
165007e433cSGuenter Roeck 			break;
166007e433cSGuenter Roeck 		*val = !!(regval & BIT(channel + 7));
167007e433cSGuenter Roeck 		break;
168007e433cSGuenter Roeck 	case hwmon_temp_fault:
169007e433cSGuenter Roeck 		/*
170007e433cSGuenter Roeck 		 * The chip clears TMP464_REMOTE_OPEN_REG after it is read
171007e433cSGuenter Roeck 		 * and only updates it after the next measurement cycle is
172007e433cSGuenter Roeck 		 * complete. That means we have to cache the value internally
173007e433cSGuenter Roeck 		 * for one measurement cycle and report the cached value.
174007e433cSGuenter Roeck 		 */
175ad231314SGuenter Roeck 		mutex_lock(&data->update_lock);
176007e433cSGuenter Roeck 		if (!data->valid || time_after(jiffies, data->last_updated +
177007e433cSGuenter Roeck 					       msecs_to_jiffies(data->update_interval))) {
178007e433cSGuenter Roeck 			err = regmap_read(regmap, TMP464_REMOTE_OPEN_REG, &regval);
179007e433cSGuenter Roeck 			if (err < 0)
180ad231314SGuenter Roeck 				goto unlock;
181007e433cSGuenter Roeck 			data->open_reg = regval;
182007e433cSGuenter Roeck 			data->last_updated = jiffies;
183007e433cSGuenter Roeck 			data->valid = true;
184007e433cSGuenter Roeck 		}
185007e433cSGuenter Roeck 		*val = !!(data->open_reg & BIT(channel + 7));
186ad231314SGuenter Roeck unlock:
187ad231314SGuenter Roeck 		mutex_unlock(&data->update_lock);
188007e433cSGuenter Roeck 		break;
189007e433cSGuenter Roeck 	case hwmon_temp_max_hyst:
190ad231314SGuenter Roeck 		regs[0] = TMP464_THERM_LIMIT[channel];
191ad231314SGuenter Roeck 		regs[1] = TMP464_TEMP_HYST_REG;
192ad231314SGuenter Roeck 		err = regmap_multi_reg_read(regmap, regs, regvals, 2);
193007e433cSGuenter Roeck 		if (err < 0)
194007e433cSGuenter Roeck 			break;
195ad231314SGuenter Roeck 		*val = temp_from_reg(regvals[0] - regvals[1]);
196007e433cSGuenter Roeck 		break;
197007e433cSGuenter Roeck 	case hwmon_temp_max:
198007e433cSGuenter Roeck 		err = regmap_read(regmap, TMP464_THERM_LIMIT[channel], &regval);
199007e433cSGuenter Roeck 		if (err < 0)
200007e433cSGuenter Roeck 			break;
201007e433cSGuenter Roeck 		*val = temp_from_reg(regval);
202007e433cSGuenter Roeck 		break;
203007e433cSGuenter Roeck 	case hwmon_temp_crit_hyst:
204ad231314SGuenter Roeck 		regs[0] = TMP464_THERM2_LIMIT[channel];
205ad231314SGuenter Roeck 		regs[1] = TMP464_TEMP_HYST_REG;
206ad231314SGuenter Roeck 		err = regmap_multi_reg_read(regmap, regs, regvals, 2);
207007e433cSGuenter Roeck 		if (err < 0)
208007e433cSGuenter Roeck 			break;
209ad231314SGuenter Roeck 		*val = temp_from_reg(regvals[0] - regvals[1]);
210007e433cSGuenter Roeck 		break;
211007e433cSGuenter Roeck 	case hwmon_temp_crit:
212007e433cSGuenter Roeck 		err = regmap_read(regmap, TMP464_THERM2_LIMIT[channel], &regval);
213007e433cSGuenter Roeck 		if (err < 0)
214007e433cSGuenter Roeck 			break;
215007e433cSGuenter Roeck 		*val = temp_from_reg(regval);
216007e433cSGuenter Roeck 		break;
217007e433cSGuenter Roeck 	case hwmon_temp_offset:
218007e433cSGuenter Roeck 		err = regmap_read(regmap, TMP464_TEMP_OFFSET_REG(channel), &regval);
219007e433cSGuenter Roeck 		if (err < 0)
220007e433cSGuenter Roeck 			break;
221007e433cSGuenter Roeck 		*val = temp_from_reg(regval);
222007e433cSGuenter Roeck 		break;
223007e433cSGuenter Roeck 	case hwmon_temp_input:
224007e433cSGuenter Roeck 		if (!data->channel[channel].enabled) {
225007e433cSGuenter Roeck 			err = -ENODATA;
226007e433cSGuenter Roeck 			break;
227007e433cSGuenter Roeck 		}
228007e433cSGuenter Roeck 		err = regmap_read(regmap, TMP464_TEMP_REG(channel), &regval);
229007e433cSGuenter Roeck 		if (err < 0)
230007e433cSGuenter Roeck 			break;
231007e433cSGuenter Roeck 		*val = temp_from_reg(regval);
232007e433cSGuenter Roeck 		break;
233007e433cSGuenter Roeck 	case hwmon_temp_enable:
234007e433cSGuenter Roeck 		*val = data->channel[channel].enabled;
235007e433cSGuenter Roeck 		break;
236007e433cSGuenter Roeck 	default:
237007e433cSGuenter Roeck 		err = -EOPNOTSUPP;
238007e433cSGuenter Roeck 		break;
239007e433cSGuenter Roeck 	}
240007e433cSGuenter Roeck 
241007e433cSGuenter Roeck 	return err;
242007e433cSGuenter Roeck }
243007e433cSGuenter Roeck 
tmp464_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * val)244007e433cSGuenter Roeck static int tmp464_read(struct device *dev, enum hwmon_sensor_types type,
245007e433cSGuenter Roeck 		       u32 attr, int channel, long *val)
246007e433cSGuenter Roeck {
247007e433cSGuenter Roeck 	switch (type) {
248007e433cSGuenter Roeck 	case hwmon_chip:
249007e433cSGuenter Roeck 		return tmp464_chip_read(dev, attr, channel, val);
250007e433cSGuenter Roeck 	case hwmon_temp:
251007e433cSGuenter Roeck 		return tmp464_temp_read(dev, attr, channel, val);
252007e433cSGuenter Roeck 	default:
253007e433cSGuenter Roeck 		return -EOPNOTSUPP;
254007e433cSGuenter Roeck 	}
255007e433cSGuenter Roeck }
256007e433cSGuenter Roeck 
tmp464_read_string(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,const char ** str)257007e433cSGuenter Roeck static int tmp464_read_string(struct device *dev, enum hwmon_sensor_types type,
258007e433cSGuenter Roeck 			      u32 attr, int channel, const char **str)
259007e433cSGuenter Roeck {
260007e433cSGuenter Roeck 	struct tmp464_data *data = dev_get_drvdata(dev);
261007e433cSGuenter Roeck 
262007e433cSGuenter Roeck 	*str = data->channel[channel].label;
263007e433cSGuenter Roeck 
264007e433cSGuenter Roeck 	return 0;
265007e433cSGuenter Roeck }
266007e433cSGuenter Roeck 
tmp464_set_convrate(struct tmp464_data * data,long interval)267007e433cSGuenter Roeck static int tmp464_set_convrate(struct tmp464_data *data, long interval)
268007e433cSGuenter Roeck {
269007e433cSGuenter Roeck 	int rate;
270007e433cSGuenter Roeck 
271007e433cSGuenter Roeck 	/*
272007e433cSGuenter Roeck 	 * For valid rates, interval in milli-seconds can be calculated as
273007e433cSGuenter Roeck 	 *      interval = 125 << (7 - rate);
274007e433cSGuenter Roeck 	 * or
275007e433cSGuenter Roeck 	 *      interval = (1 << (7 - rate)) * 125;
276007e433cSGuenter Roeck 	 * The rate is therefore
277007e433cSGuenter Roeck 	 *      rate = 7 - __fls(interval / 125);
278007e433cSGuenter Roeck 	 * and the rounded rate is
279007e433cSGuenter Roeck 	 *      rate = 7 - __fls(interval * 4 / (125 * 3));
280007e433cSGuenter Roeck 	 * Use clamp_val() to avoid overflows, and to ensure valid input
281007e433cSGuenter Roeck 	 * for __fls.
282007e433cSGuenter Roeck 	 */
283007e433cSGuenter Roeck 	interval = clamp_val(interval, 125, 16000);
284007e433cSGuenter Roeck 	rate = 7 - __fls(interval * 4 / (125 * 3));
285007e433cSGuenter Roeck 	data->update_interval = 125 << (7 - rate);
286007e433cSGuenter Roeck 
287007e433cSGuenter Roeck 	return regmap_update_bits(data->regmap, TMP464_CONFIG_REG,
288007e433cSGuenter Roeck 				  TMP464_CONFIG_CONVERSION_RATE_MASK,
289007e433cSGuenter Roeck 				  rate << TMP464_CONFIG_CONVERSION_RATE_B0);
290007e433cSGuenter Roeck }
291007e433cSGuenter Roeck 
tmp464_chip_write(struct tmp464_data * data,u32 attr,int channel,long val)292007e433cSGuenter Roeck static int tmp464_chip_write(struct tmp464_data *data, u32 attr, int channel, long val)
293007e433cSGuenter Roeck {
294007e433cSGuenter Roeck 	switch (attr) {
295007e433cSGuenter Roeck 	case hwmon_chip_update_interval:
296007e433cSGuenter Roeck 		return tmp464_set_convrate(data, val);
297007e433cSGuenter Roeck 	default:
298007e433cSGuenter Roeck 		return -EOPNOTSUPP;
299007e433cSGuenter Roeck 	}
300007e433cSGuenter Roeck }
301007e433cSGuenter Roeck 
tmp464_temp_write(struct tmp464_data * data,u32 attr,int channel,long val)302007e433cSGuenter Roeck static int tmp464_temp_write(struct tmp464_data *data, u32 attr, int channel, long val)
303007e433cSGuenter Roeck {
304007e433cSGuenter Roeck 	struct regmap *regmap = data->regmap;
305007e433cSGuenter Roeck 	unsigned int regval;
306007e433cSGuenter Roeck 	int err = 0;
307007e433cSGuenter Roeck 
308007e433cSGuenter Roeck 	switch (attr) {
309007e433cSGuenter Roeck 	case hwmon_temp_max_hyst:
310007e433cSGuenter Roeck 		err = regmap_read(regmap, TMP464_THERM_LIMIT[0], &regval);
311007e433cSGuenter Roeck 		if (err < 0)
312007e433cSGuenter Roeck 			break;
313007e433cSGuenter Roeck 		val = clamp_val(val, -256000, 256000);	/* prevent overflow/underflow */
314007e433cSGuenter Roeck 		val = clamp_val(temp_from_reg(regval) - val, 0, 255000);
315007e433cSGuenter Roeck 		err = regmap_write(regmap, TMP464_TEMP_HYST_REG,
316007e433cSGuenter Roeck 				   DIV_ROUND_CLOSEST(val, 1000) << 7);
317007e433cSGuenter Roeck 		break;
318007e433cSGuenter Roeck 	case hwmon_temp_max:
319007e433cSGuenter Roeck 		val = temp_to_limit_reg(clamp_val(val, -255000, 255500));
320007e433cSGuenter Roeck 		err = regmap_write(regmap, TMP464_THERM_LIMIT[channel], val);
321007e433cSGuenter Roeck 		break;
322007e433cSGuenter Roeck 	case hwmon_temp_crit:
323007e433cSGuenter Roeck 		val = temp_to_limit_reg(clamp_val(val, -255000, 255500));
324007e433cSGuenter Roeck 		err = regmap_write(regmap, TMP464_THERM2_LIMIT[channel], val);
325007e433cSGuenter Roeck 		break;
326007e433cSGuenter Roeck 	case hwmon_temp_offset:
327007e433cSGuenter Roeck 		val = temp_to_offset_reg(clamp_val(val, -128000, 127937));
328007e433cSGuenter Roeck 		err = regmap_write(regmap, TMP464_TEMP_OFFSET_REG(channel), val);
329007e433cSGuenter Roeck 		break;
330007e433cSGuenter Roeck 	case hwmon_temp_enable:
331007e433cSGuenter Roeck 		data->channel[channel].enabled = !!val;
332007e433cSGuenter Roeck 		err = tmp464_enable_channels(data);
333007e433cSGuenter Roeck 		break;
334007e433cSGuenter Roeck 	default:
335007e433cSGuenter Roeck 		err = -EOPNOTSUPP;
336007e433cSGuenter Roeck 		break;
337007e433cSGuenter Roeck 	}
338007e433cSGuenter Roeck 
339007e433cSGuenter Roeck 	return err;
340007e433cSGuenter Roeck }
341007e433cSGuenter Roeck 
tmp464_write(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long val)342007e433cSGuenter Roeck static int tmp464_write(struct device *dev, enum hwmon_sensor_types type,
343007e433cSGuenter Roeck 			u32 attr, int channel, long val)
344007e433cSGuenter Roeck {
345007e433cSGuenter Roeck 	struct tmp464_data *data = dev_get_drvdata(dev);
346007e433cSGuenter Roeck 	int err;
347007e433cSGuenter Roeck 
348007e433cSGuenter Roeck 	mutex_lock(&data->update_lock);
349007e433cSGuenter Roeck 
350007e433cSGuenter Roeck 	switch (type) {
351007e433cSGuenter Roeck 	case hwmon_chip:
352007e433cSGuenter Roeck 		err = tmp464_chip_write(data, attr, channel, val);
353007e433cSGuenter Roeck 		break;
354007e433cSGuenter Roeck 	case hwmon_temp:
355007e433cSGuenter Roeck 		err = tmp464_temp_write(data, attr, channel, val);
356007e433cSGuenter Roeck 		break;
357007e433cSGuenter Roeck 	default:
358007e433cSGuenter Roeck 		err = -EOPNOTSUPP;
359007e433cSGuenter Roeck 		break;
360007e433cSGuenter Roeck 	}
361007e433cSGuenter Roeck 
362007e433cSGuenter Roeck 	mutex_unlock(&data->update_lock);
363007e433cSGuenter Roeck 
364007e433cSGuenter Roeck 	return err;
365007e433cSGuenter Roeck }
366007e433cSGuenter Roeck 
tmp464_is_visible(const void * _data,enum hwmon_sensor_types type,u32 attr,int channel)367007e433cSGuenter Roeck static umode_t tmp464_is_visible(const void *_data, enum hwmon_sensor_types type,
368007e433cSGuenter Roeck 				 u32 attr, int channel)
369007e433cSGuenter Roeck {
370007e433cSGuenter Roeck 	const struct tmp464_data *data = _data;
371007e433cSGuenter Roeck 
372007e433cSGuenter Roeck 	if (channel >= data->channels)
373007e433cSGuenter Roeck 		return 0;
374007e433cSGuenter Roeck 
375007e433cSGuenter Roeck 	if (type == hwmon_chip) {
376007e433cSGuenter Roeck 		if (attr == hwmon_chip_update_interval)
377007e433cSGuenter Roeck 			return 0644;
378007e433cSGuenter Roeck 		return 0;
379007e433cSGuenter Roeck 	}
380007e433cSGuenter Roeck 
381007e433cSGuenter Roeck 	switch (attr) {
382007e433cSGuenter Roeck 	case hwmon_temp_input:
383007e433cSGuenter Roeck 	case hwmon_temp_max_alarm:
384007e433cSGuenter Roeck 	case hwmon_temp_crit_alarm:
385007e433cSGuenter Roeck 	case hwmon_temp_crit_hyst:
386007e433cSGuenter Roeck 		return 0444;
387007e433cSGuenter Roeck 	case hwmon_temp_enable:
388007e433cSGuenter Roeck 	case hwmon_temp_max:
389007e433cSGuenter Roeck 	case hwmon_temp_crit:
390007e433cSGuenter Roeck 		return 0644;
391007e433cSGuenter Roeck 	case hwmon_temp_max_hyst:
392007e433cSGuenter Roeck 		if (!channel)
393007e433cSGuenter Roeck 			return 0644;
394007e433cSGuenter Roeck 		return 0444;
395007e433cSGuenter Roeck 	case hwmon_temp_label:
396007e433cSGuenter Roeck 		if (data->channel[channel].label)
397007e433cSGuenter Roeck 			return 0444;
398007e433cSGuenter Roeck 		return 0;
399007e433cSGuenter Roeck 	case hwmon_temp_fault:
400007e433cSGuenter Roeck 		if (channel)
401007e433cSGuenter Roeck 			return 0444;
402007e433cSGuenter Roeck 		return 0;
403007e433cSGuenter Roeck 	case hwmon_temp_offset:
404007e433cSGuenter Roeck 		if (channel)
405007e433cSGuenter Roeck 			return 0644;
406007e433cSGuenter Roeck 		return 0;
407007e433cSGuenter Roeck 	default:
408007e433cSGuenter Roeck 		return 0;
409007e433cSGuenter Roeck 	}
410007e433cSGuenter Roeck }
411007e433cSGuenter Roeck 
tmp464_restore_lock(void * regmap)412007e433cSGuenter Roeck static void tmp464_restore_lock(void *regmap)
413007e433cSGuenter Roeck {
414007e433cSGuenter Roeck 	regmap_write(regmap, TMP464_LOCK_REG, TMP464_LOCK_VAL);
415007e433cSGuenter Roeck }
416007e433cSGuenter Roeck 
tmp464_restore_config(void * _data)417007e433cSGuenter Roeck static void tmp464_restore_config(void *_data)
418007e433cSGuenter Roeck {
419007e433cSGuenter Roeck 	struct tmp464_data *data = _data;
420007e433cSGuenter Roeck 
421007e433cSGuenter Roeck 	regmap_write(data->regmap, TMP464_CONFIG_REG, data->config_orig);
422007e433cSGuenter Roeck }
423007e433cSGuenter Roeck 
tmp464_init_client(struct device * dev,struct tmp464_data * data)424007e433cSGuenter Roeck static int tmp464_init_client(struct device *dev, struct tmp464_data *data)
425007e433cSGuenter Roeck {
426007e433cSGuenter Roeck 	struct regmap *regmap = data->regmap;
427007e433cSGuenter Roeck 	unsigned int regval;
428007e433cSGuenter Roeck 	int err;
429007e433cSGuenter Roeck 
430007e433cSGuenter Roeck 	err = regmap_read(regmap, TMP464_LOCK_REG, &regval);
431007e433cSGuenter Roeck 	if (err)
432007e433cSGuenter Roeck 		return err;
433007e433cSGuenter Roeck 	if (regval == TMP464_LOCKED) {
434007e433cSGuenter Roeck 		/* Explicitly unlock chip if it is locked */
435007e433cSGuenter Roeck 		err = regmap_write(regmap, TMP464_LOCK_REG, TMP464_UNLOCK_VAL);
436007e433cSGuenter Roeck 		if (err)
437007e433cSGuenter Roeck 			return err;
438007e433cSGuenter Roeck 		/* and lock it again when unloading the driver */
439007e433cSGuenter Roeck 		err = devm_add_action_or_reset(dev, tmp464_restore_lock, regmap);
440007e433cSGuenter Roeck 		if (err)
441007e433cSGuenter Roeck 			return err;
442007e433cSGuenter Roeck 	}
443007e433cSGuenter Roeck 
444007e433cSGuenter Roeck 	err = regmap_read(regmap, TMP464_CONFIG_REG, &regval);
445007e433cSGuenter Roeck 	if (err)
446007e433cSGuenter Roeck 		return err;
447007e433cSGuenter Roeck 	data->config_orig = regval;
448007e433cSGuenter Roeck 	err = devm_add_action_or_reset(dev, tmp464_restore_config, data);
449007e433cSGuenter Roeck 	if (err)
450007e433cSGuenter Roeck 		return err;
451007e433cSGuenter Roeck 
452007e433cSGuenter Roeck 	/* Default to 500 ms update interval */
453007e433cSGuenter Roeck 	err = regmap_update_bits(regmap, TMP464_CONFIG_REG,
454007e433cSGuenter Roeck 				 TMP464_CONFIG_CONVERSION_RATE_MASK | TMP464_CONFIG_SHUTDOWN,
455007e433cSGuenter Roeck 				 BIT(TMP464_CONFIG_CONVERSION_RATE_B0) |
456007e433cSGuenter Roeck 				 BIT(TMP464_CONFIG_CONVERSION_RATE_B2));
457007e433cSGuenter Roeck 	if (err)
458007e433cSGuenter Roeck 		return err;
459007e433cSGuenter Roeck 
460007e433cSGuenter Roeck 	data->update_interval = 500;
461007e433cSGuenter Roeck 
462007e433cSGuenter Roeck 	return tmp464_enable_channels(data);
463007e433cSGuenter Roeck }
464007e433cSGuenter Roeck 
tmp464_detect(struct i2c_client * client,struct i2c_board_info * info)465007e433cSGuenter Roeck static int tmp464_detect(struct i2c_client *client,
466007e433cSGuenter Roeck 			 struct i2c_board_info *info)
467007e433cSGuenter Roeck {
468007e433cSGuenter Roeck 	struct i2c_adapter *adapter = client->adapter;
469007e433cSGuenter Roeck 	char *name, *chip;
470007e433cSGuenter Roeck 	int reg;
471007e433cSGuenter Roeck 
472007e433cSGuenter Roeck 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA))
473007e433cSGuenter Roeck 		return -ENODEV;
474007e433cSGuenter Roeck 
475007e433cSGuenter Roeck 	reg = i2c_smbus_read_word_swapped(client, TMP464_MANUFACTURER_ID_REG);
476007e433cSGuenter Roeck 	if (reg < 0)
477007e433cSGuenter Roeck 		return reg;
478007e433cSGuenter Roeck 	if (reg != TMP464_MANUFACTURER_ID)
479007e433cSGuenter Roeck 		return -ENODEV;
480007e433cSGuenter Roeck 
481007e433cSGuenter Roeck 	/* Check for "always return zero" bits */
482007e433cSGuenter Roeck 	reg = i2c_smbus_read_word_swapped(client, TMP464_THERM_STATUS_REG);
483007e433cSGuenter Roeck 	if (reg < 0)
484007e433cSGuenter Roeck 		return reg;
485007e433cSGuenter Roeck 	if (reg & 0x1f)
486007e433cSGuenter Roeck 		return -ENODEV;
487007e433cSGuenter Roeck 	reg = i2c_smbus_read_word_swapped(client, TMP464_THERM2_STATUS_REG);
488007e433cSGuenter Roeck 	if (reg < 0)
489007e433cSGuenter Roeck 		return reg;
490007e433cSGuenter Roeck 	if (reg & 0x1f)
491007e433cSGuenter Roeck 		return -ENODEV;
492007e433cSGuenter Roeck 
493007e433cSGuenter Roeck 	reg = i2c_smbus_read_word_swapped(client, TMP464_DEVICE_ID_REG);
494007e433cSGuenter Roeck 	if (reg < 0)
495007e433cSGuenter Roeck 		return reg;
496007e433cSGuenter Roeck 	switch (reg) {
497007e433cSGuenter Roeck 	case TMP464_DEVICE_ID:
498007e433cSGuenter Roeck 		name = "tmp464";
499007e433cSGuenter Roeck 		chip = "TMP464";
500007e433cSGuenter Roeck 		break;
501007e433cSGuenter Roeck 	case TMP468_DEVICE_ID:
502007e433cSGuenter Roeck 		name = "tmp468";
503007e433cSGuenter Roeck 		chip = "TMP468";
504007e433cSGuenter Roeck 		break;
505007e433cSGuenter Roeck 	default:
506007e433cSGuenter Roeck 		return -ENODEV;
507007e433cSGuenter Roeck 	}
508007e433cSGuenter Roeck 
509007e433cSGuenter Roeck 	strscpy(info->type, name, I2C_NAME_SIZE);
510007e433cSGuenter Roeck 	dev_info(&adapter->dev, "Detected TI %s chip at 0x%02x\n", chip, client->addr);
511007e433cSGuenter Roeck 
512007e433cSGuenter Roeck 	return 0;
513007e433cSGuenter Roeck }
514007e433cSGuenter Roeck 
tmp464_probe_child_from_dt(struct device * dev,struct device_node * child,struct tmp464_data * data)515007e433cSGuenter Roeck static int tmp464_probe_child_from_dt(struct device *dev,
516007e433cSGuenter Roeck 				      struct device_node *child,
517007e433cSGuenter Roeck 				      struct tmp464_data *data)
518007e433cSGuenter Roeck 
519007e433cSGuenter Roeck {
520007e433cSGuenter Roeck 	struct regmap *regmap = data->regmap;
521007e433cSGuenter Roeck 	u32 channel;
522007e433cSGuenter Roeck 	s32 nfactor;
523007e433cSGuenter Roeck 	int err;
524007e433cSGuenter Roeck 
525007e433cSGuenter Roeck 	err = of_property_read_u32(child, "reg", &channel);
526007e433cSGuenter Roeck 	if (err) {
527007e433cSGuenter Roeck 		dev_err(dev, "missing reg property of %pOFn\n", child);
528007e433cSGuenter Roeck 		return err;
529007e433cSGuenter Roeck 	}
530007e433cSGuenter Roeck 
531007e433cSGuenter Roeck 	if (channel >= data->channels) {
532007e433cSGuenter Roeck 		dev_err(dev, "invalid reg %d of %pOFn\n", channel, child);
533007e433cSGuenter Roeck 		return -EINVAL;
534007e433cSGuenter Roeck 	}
535007e433cSGuenter Roeck 
536007e433cSGuenter Roeck 	of_property_read_string(child, "label", &data->channel[channel].label);
537007e433cSGuenter Roeck 
538007e433cSGuenter Roeck 	data->channel[channel].enabled = of_device_is_available(child);
539007e433cSGuenter Roeck 
540007e433cSGuenter Roeck 	err = of_property_read_s32(child, "ti,n-factor", &nfactor);
541007e433cSGuenter Roeck 	if (err && err != -EINVAL)
542007e433cSGuenter Roeck 		return err;
543007e433cSGuenter Roeck 	if (!err) {
544007e433cSGuenter Roeck 		if (channel == 0) {
545007e433cSGuenter Roeck 			dev_err(dev, "n-factor can't be set for internal channel\n");
546007e433cSGuenter Roeck 			return -EINVAL;
547007e433cSGuenter Roeck 		}
548007e433cSGuenter Roeck 		if (nfactor > 127 || nfactor < -128) {
549007e433cSGuenter Roeck 			dev_err(dev, "n-factor for channel %d invalid (%d)\n",
550007e433cSGuenter Roeck 				channel, nfactor);
551007e433cSGuenter Roeck 			return -EINVAL;
552007e433cSGuenter Roeck 		}
553007e433cSGuenter Roeck 		err = regmap_write(regmap, TMP464_N_FACTOR_REG(channel),
554007e433cSGuenter Roeck 				   (nfactor << 8) & 0xff00);
555007e433cSGuenter Roeck 		if (err)
556007e433cSGuenter Roeck 			return err;
557007e433cSGuenter Roeck 	}
558007e433cSGuenter Roeck 
559007e433cSGuenter Roeck 	return 0;
560007e433cSGuenter Roeck }
561007e433cSGuenter Roeck 
tmp464_probe_from_dt(struct device * dev,struct tmp464_data * data)562007e433cSGuenter Roeck static int tmp464_probe_from_dt(struct device *dev, struct tmp464_data *data)
563007e433cSGuenter Roeck {
564007e433cSGuenter Roeck 	const struct device_node *np = dev->of_node;
565007e433cSGuenter Roeck 	int err;
566007e433cSGuenter Roeck 
567*d5b07232SJinjie Ruan 	for_each_child_of_node_scoped(np, child) {
568007e433cSGuenter Roeck 		if (strcmp(child->name, "channel"))
569007e433cSGuenter Roeck 			continue;
570007e433cSGuenter Roeck 
571007e433cSGuenter Roeck 		err = tmp464_probe_child_from_dt(dev, child, data);
572*d5b07232SJinjie Ruan 		if (err)
573007e433cSGuenter Roeck 			return err;
574007e433cSGuenter Roeck 	}
575007e433cSGuenter Roeck 
576007e433cSGuenter Roeck 	return 0;
577007e433cSGuenter Roeck }
578007e433cSGuenter Roeck 
579007e433cSGuenter Roeck static const struct hwmon_ops tmp464_ops = {
580007e433cSGuenter Roeck 	.is_visible = tmp464_is_visible,
581007e433cSGuenter Roeck 	.read = tmp464_read,
582007e433cSGuenter Roeck 	.read_string = tmp464_read_string,
583007e433cSGuenter Roeck 	.write = tmp464_write,
584007e433cSGuenter Roeck };
585007e433cSGuenter Roeck 
58698bc085cSKrzysztof Kozlowski static const struct hwmon_channel_info * const tmp464_info[] = {
587007e433cSGuenter Roeck 	HWMON_CHANNEL_INFO(chip,
588007e433cSGuenter Roeck 			   HWMON_C_UPDATE_INTERVAL),
589007e433cSGuenter Roeck 	HWMON_CHANNEL_INFO(temp,
590007e433cSGuenter Roeck 			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | HWMON_T_CRIT |
591007e433cSGuenter Roeck 			   HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM |
592007e433cSGuenter Roeck 			   HWMON_T_LABEL | HWMON_T_ENABLE,
593007e433cSGuenter Roeck 			   HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
594007e433cSGuenter Roeck 			   HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
595007e433cSGuenter Roeck 			   HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
596007e433cSGuenter Roeck 			   HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
597007e433cSGuenter Roeck 			   HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
598007e433cSGuenter Roeck 			   HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
599007e433cSGuenter Roeck 			   HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
600007e433cSGuenter Roeck 			   HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
601007e433cSGuenter Roeck 			   HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
602007e433cSGuenter Roeck 			   HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
603007e433cSGuenter Roeck 			   HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
604007e433cSGuenter Roeck 			   HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
605007e433cSGuenter Roeck 			   HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
606007e433cSGuenter Roeck 			   HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
607007e433cSGuenter Roeck 			   HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
608007e433cSGuenter Roeck 			   HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
609007e433cSGuenter Roeck 			   HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
610007e433cSGuenter Roeck 			   HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
611007e433cSGuenter Roeck 			   HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
612007e433cSGuenter Roeck 			   HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
613007e433cSGuenter Roeck 			   HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
614007e433cSGuenter Roeck 			   HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
615007e433cSGuenter Roeck 			   HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
616007e433cSGuenter Roeck 			   HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE),
617007e433cSGuenter Roeck 	NULL
618007e433cSGuenter Roeck };
619007e433cSGuenter Roeck 
620007e433cSGuenter Roeck static const struct hwmon_chip_info tmp464_chip_info = {
621007e433cSGuenter Roeck 	.ops = &tmp464_ops,
622007e433cSGuenter Roeck 	.info = tmp464_info,
623007e433cSGuenter Roeck };
624007e433cSGuenter Roeck 
625007e433cSGuenter Roeck /* regmap */
626007e433cSGuenter Roeck 
tmp464_is_volatile_reg(struct device * dev,unsigned int reg)627007e433cSGuenter Roeck static bool tmp464_is_volatile_reg(struct device *dev, unsigned int reg)
628007e433cSGuenter Roeck {
629007e433cSGuenter Roeck 	return (reg < TMP464_TEMP_REG(TMP468_NUM_CHANNELS) ||
630007e433cSGuenter Roeck 		reg == TMP464_THERM_STATUS_REG ||
631007e433cSGuenter Roeck 		reg == TMP464_THERM2_STATUS_REG ||
632007e433cSGuenter Roeck 		reg == TMP464_REMOTE_OPEN_REG);
633007e433cSGuenter Roeck }
634007e433cSGuenter Roeck 
635007e433cSGuenter Roeck static const struct regmap_config tmp464_regmap_config = {
636007e433cSGuenter Roeck 	.reg_bits = 8,
637007e433cSGuenter Roeck 	.val_bits = 16,
638007e433cSGuenter Roeck 	.max_register = TMP464_DEVICE_ID_REG,
639007e433cSGuenter Roeck 	.volatile_reg = tmp464_is_volatile_reg,
640007e433cSGuenter Roeck 	.val_format_endian = REGMAP_ENDIAN_BIG,
6417357b187SMark Brown 	.cache_type = REGCACHE_MAPLE,
642007e433cSGuenter Roeck 	.use_single_read = true,
643007e433cSGuenter Roeck 	.use_single_write = true,
644007e433cSGuenter Roeck };
645007e433cSGuenter Roeck 
tmp464_probe(struct i2c_client * client)646007e433cSGuenter Roeck static int tmp464_probe(struct i2c_client *client)
647007e433cSGuenter Roeck {
648007e433cSGuenter Roeck 	struct device *dev = &client->dev;
649007e433cSGuenter Roeck 	struct device *hwmon_dev;
650007e433cSGuenter Roeck 	struct tmp464_data *data;
651007e433cSGuenter Roeck 	int i, err;
652007e433cSGuenter Roeck 
653007e433cSGuenter Roeck 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
654007e433cSGuenter Roeck 		dev_err(&client->dev, "i2c functionality check failed\n");
655007e433cSGuenter Roeck 		return -ENODEV;
656007e433cSGuenter Roeck 	}
657007e433cSGuenter Roeck 	data = devm_kzalloc(dev, sizeof(struct tmp464_data), GFP_KERNEL);
658007e433cSGuenter Roeck 	if (!data)
659007e433cSGuenter Roeck 		return -ENOMEM;
660007e433cSGuenter Roeck 
661007e433cSGuenter Roeck 	mutex_init(&data->update_lock);
662007e433cSGuenter Roeck 
66338a085f9SAndrew Davis 	data->channels = (int)(unsigned long)i2c_get_match_data(client);
664007e433cSGuenter Roeck 
665007e433cSGuenter Roeck 	data->regmap = devm_regmap_init_i2c(client, &tmp464_regmap_config);
666007e433cSGuenter Roeck 	if (IS_ERR(data->regmap))
667007e433cSGuenter Roeck 		return PTR_ERR(data->regmap);
668007e433cSGuenter Roeck 
669007e433cSGuenter Roeck 	for (i = 0; i < data->channels; i++)
670007e433cSGuenter Roeck 		data->channel[i].enabled = true;
671007e433cSGuenter Roeck 
672007e433cSGuenter Roeck 	err = tmp464_init_client(dev, data);
673007e433cSGuenter Roeck 	if (err)
674007e433cSGuenter Roeck 		return err;
675007e433cSGuenter Roeck 
676007e433cSGuenter Roeck 	if (dev->of_node) {
677007e433cSGuenter Roeck 		err = tmp464_probe_from_dt(dev, data);
678007e433cSGuenter Roeck 		if (err)
679007e433cSGuenter Roeck 			return err;
680007e433cSGuenter Roeck 	}
681007e433cSGuenter Roeck 
682007e433cSGuenter Roeck 	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
683007e433cSGuenter Roeck 							 data, &tmp464_chip_info, NULL);
684007e433cSGuenter Roeck 	return PTR_ERR_OR_ZERO(hwmon_dev);
685007e433cSGuenter Roeck }
686007e433cSGuenter Roeck 
687007e433cSGuenter Roeck static struct i2c_driver tmp464_driver = {
688007e433cSGuenter Roeck 	.class = I2C_CLASS_HWMON,
689007e433cSGuenter Roeck 	.driver = {
690007e433cSGuenter Roeck 		.name	= "tmp464",
691007e433cSGuenter Roeck 		.of_match_table = of_match_ptr(tmp464_of_match),
692007e433cSGuenter Roeck 	},
6931975d167SUwe Kleine-König 	.probe = tmp464_probe,
694007e433cSGuenter Roeck 	.id_table = tmp464_id,
695007e433cSGuenter Roeck 	.detect = tmp464_detect,
696007e433cSGuenter Roeck 	.address_list = normal_i2c,
697007e433cSGuenter Roeck };
698007e433cSGuenter Roeck 
699007e433cSGuenter Roeck module_i2c_driver(tmp464_driver);
700007e433cSGuenter Roeck 
701007e433cSGuenter Roeck MODULE_AUTHOR("Agathe Porte <agathe.porte@nokia.com>");
702007e433cSGuenter Roeck MODULE_DESCRIPTION("Texas Instruments TMP464 temperature sensor driver");
703007e433cSGuenter Roeck MODULE_LICENSE("GPL");
704