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Searched full:phydev (Results 1 – 25 of 169) sorted by relevance

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/linux/drivers/net/phy/
H A Dbroadcom.c26 #define BRCM_PHY_REV(phydev) \ argument
27 ((phydev)->drv->phy_id & ~((phydev)->drv->phy_id_mask))
63 static bool bcm54xx_phy_can_wakeup(struct phy_device *phydev) in bcm54xx_phy_can_wakeup() argument
65 struct bcm54xx_phy_priv *priv = phydev->priv; in bcm54xx_phy_can_wakeup()
67 return phy_interrupt_is_valid(phydev) || priv->wake_irq >= 0; in bcm54xx_phy_can_wakeup()
70 static int bcm54xx_config_clock_delay(struct phy_device *phydev) in bcm54xx_config_clock_delay() argument
75 val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC); in bcm54xx_config_clock_delay()
77 if (phydev->interface == PHY_INTERFACE_MODE_RGMII || in bcm54xx_config_clock_delay()
78 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { in bcm54xx_config_clock_delay()
82 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || in bcm54xx_config_clock_delay()
[all …]
H A Dphy_device.c57 int (*run)(struct phy_device *phydev);
210 void phy_device_free(struct phy_device *phydev) in phy_device_free() argument
212 put_device(&phydev->mdio.dev); in phy_device_free()
218 struct phy_device *phydev; in phy_mdio_device_free() local
220 phydev = container_of(mdiodev, struct phy_device, mdio); in phy_mdio_device_free()
221 phy_device_free(phydev); in phy_mdio_device_free()
232 struct phy_device *phydev; in phy_mdio_device_remove() local
234 phydev = container_of(mdiodev, struct phy_device, mdio); in phy_mdio_device_remove()
235 phy_device_remove(phydev); in phy_mdio_device_remove()
243 static bool phy_drv_wol_enabled(struct phy_device *phydev) in phy_drv_wol_enabled() argument
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H A Dbcm-phy-lib.c21 int __bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val) in __bcm_phy_write_exp() argument
25 rc = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg); in __bcm_phy_write_exp()
29 return __phy_write(phydev, MII_BCM54XX_EXP_DATA, val); in __bcm_phy_write_exp()
33 int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val) in bcm_phy_write_exp() argument
37 phy_lock_mdio_bus(phydev); in bcm_phy_write_exp()
38 rc = __bcm_phy_write_exp(phydev, reg, val); in bcm_phy_write_exp()
39 phy_unlock_mdio_bus(phydev); in bcm_phy_write_exp()
45 int __bcm_phy_read_exp(struct phy_device *phydev, u16 reg) in __bcm_phy_read_exp() argument
49 val = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg); in __bcm_phy_read_exp()
53 val = __phy_read(phydev, MII_BCM54XX_EXP_DATA); in __bcm_phy_read_exp()
[all …]
H A Dnxp-c45-tja11xx-macsec.c290 static int nxp_c45_macsec_write(struct phy_device *phydev, u16 addr, u32 value) in nxp_c45_macsec_write() argument
298 phydev_dbg(phydev, "write addr 0x%x value 0x%x\n", addr, value); in nxp_c45_macsec_write()
301 ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, laddr, lvalue); in nxp_c45_macsec_write()
307 ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, laddr, lvalue); in nxp_c45_macsec_write()
312 static int nxp_c45_macsec_read(struct phy_device *phydev, u16 addr, u32 *value) in nxp_c45_macsec_read() argument
321 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, laddr); in nxp_c45_macsec_read()
327 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, laddr); in nxp_c45_macsec_read()
334 phydev_dbg(phydev, "read addr 0x%x value 0x%x\n", addr, *value); in nxp_c45_macsec_read()
339 static void nxp_c45_macsec_read32_64(struct phy_device *phydev, u16 addr, in nxp_c45_macsec_read32_64() argument
344 nxp_c45_macsec_read(phydev, addr, &lvalue); in nxp_c45_macsec_read32_64()
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H A Dbcm7xxx.c50 static int bcm7xxx_28nm_d0_afe_config_init(struct phy_device *phydev) in bcm7xxx_28nm_d0_afe_config_init() argument
53 bcm_phy_write_misc(phydev, AFE_RXCONFIG_0, 0xeb15); in bcm7xxx_28nm_d0_afe_config_init()
56 bcm_phy_write_misc(phydev, AFE_RXCONFIG_1, 0x9b2f); in bcm7xxx_28nm_d0_afe_config_init()
59 bcm_phy_write_misc(phydev, AFE_RXCONFIG_2, 0x2003); in bcm7xxx_28nm_d0_afe_config_init()
62 bcm_phy_write_misc(phydev, AFE_RX_LP_COUNTER, 0x7fc0); in bcm7xxx_28nm_d0_afe_config_init()
65 bcm_phy_write_misc(phydev, AFE_TX_CONFIG, 0x431); in bcm7xxx_28nm_d0_afe_config_init()
68 bcm_phy_write_misc(phydev, AFE_VDCA_ICTRL_0, 0xa7da); in bcm7xxx_28nm_d0_afe_config_init()
71 bcm_phy_write_misc(phydev, AFE_VDAC_OTHERS_0, 0xa020); in bcm7xxx_28nm_d0_afe_config_init()
76 bcm_phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x00e3); in bcm7xxx_28nm_d0_afe_config_init()
79 phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x0010); in bcm7xxx_28nm_d0_afe_config_init()
[all …]
H A Dmicrel.c409 struct phy_device *phydev; member
427 struct phy_device *phydev; member
548 static int kszphy_extended_write(struct phy_device *phydev, in kszphy_extended_write() argument
551 phy_write(phydev, MII_KSZPHY_EXTREG, KSZPHY_EXTREG_WRITE | regnum); in kszphy_extended_write()
552 return phy_write(phydev, MII_KSZPHY_EXTREG_WRITE, val); in kszphy_extended_write()
555 static int kszphy_extended_read(struct phy_device *phydev, in kszphy_extended_read() argument
558 phy_write(phydev, MII_KSZPHY_EXTREG, regnum); in kszphy_extended_read()
559 return phy_read(phydev, MII_KSZPHY_EXTREG_READ); in kszphy_extended_read()
562 static int kszphy_ack_interrupt(struct phy_device *phydev) in kszphy_ack_interrupt() argument
567 rc = phy_read(phydev, MII_KSZPHY_INTCS); in kszphy_ack_interrupt()
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H A Dmotorcomm.c390 * @phydev: a pointer to a &struct phy_device
397 static int ytphy_read_ext(struct phy_device *phydev, u16 regnum) in ytphy_read_ext() argument
401 ret = __phy_write(phydev, YTPHY_PAGE_SELECT, regnum); in ytphy_read_ext()
405 return __phy_read(phydev, YTPHY_PAGE_DATA); in ytphy_read_ext()
410 * @phydev: a pointer to a &struct phy_device
415 static int ytphy_read_ext_with_lock(struct phy_device *phydev, u16 regnum) in ytphy_read_ext_with_lock() argument
419 phy_lock_mdio_bus(phydev); in ytphy_read_ext_with_lock()
420 ret = ytphy_read_ext(phydev, regnum); in ytphy_read_ext_with_lock()
421 phy_unlock_mdio_bus(phydev); in ytphy_read_ext_with_lock()
428 * @phydev: a pointer to a &struct phy_device
[all …]
H A Ddp83869.c157 static int dp83869_config_aneg(struct phy_device *phydev) in dp83869_config_aneg() argument
159 struct dp83869_private *dp83869 = phydev->priv; in dp83869_config_aneg()
162 return genphy_config_aneg(phydev); in dp83869_config_aneg()
164 return genphy_c37_config_aneg(phydev); in dp83869_config_aneg()
167 static int dp83869_read_status(struct phy_device *phydev) in dp83869_read_status() argument
169 struct dp83869_private *dp83869 = phydev->priv; in dp83869_read_status()
174 return genphy_c37_read_status(phydev, &changed); in dp83869_read_status()
176 ret = genphy_read_status(phydev); in dp83869_read_status()
181 if (phydev->link) { in dp83869_read_status()
182 phydev->speed = SPEED_100; in dp83869_read_status()
[all …]
H A Dbcm-phy-lib.h33 int __bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);
34 int __bcm_phy_read_exp(struct phy_device *phydev, u16 reg);
35 int __bcm_phy_modify_exp(struct phy_device *phydev, u16 reg, u16 mask, u16 set);
36 int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);
37 int bcm_phy_read_exp(struct phy_device *phydev, u16 reg);
38 int bcm_phy_modify_exp(struct phy_device *phydev, u16 reg, u16 mask, u16 set);
40 static inline int bcm_phy_write_exp_sel(struct phy_device *phydev, in bcm_phy_write_exp_sel() argument
43 return bcm_phy_write_exp(phydev, reg | MII_BCM54XX_EXP_SEL_ER, val); in bcm_phy_write_exp_sel()
46 static inline int bcm_phy_read_exp_sel(struct phy_device *phydev, u16 reg) in bcm_phy_read_exp_sel() argument
48 return bcm_phy_read_exp(phydev, reg | MII_BCM54XX_EXP_SEL_ER); in bcm_phy_read_exp_sel()
[all …]
H A Dmarvell-88q2xxx.c220 static int mv88q2xxx_write_mmd_vals(struct phy_device *phydev, in mv88q2xxx_write_mmd_vals() argument
226 ret = phy_write_mmd(phydev, vals->devad, vals->regnum, in mv88q2xxx_write_mmd_vals()
235 static int mv88q2xxx_soft_reset(struct phy_device *phydev) in mv88q2xxx_soft_reset() argument
241 if (phydev->autoneg == AUTONEG_ENABLE || phydev->speed == SPEED_1000) { in mv88q2xxx_soft_reset()
242 ret = phy_write_mmd(phydev, MDIO_MMD_PCS, 0xfe1b, 0x48); in mv88q2xxx_soft_reset()
247 ret = phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_1000BT1_CTRL, in mv88q2xxx_soft_reset()
252 ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_PCS, in mv88q2xxx_soft_reset()
259 ret = phy_write_mmd(phydev, MDIO_MMD_PCS, 0xffe4, 0xc); in mv88q2xxx_soft_reset()
264 if (phydev->autoneg == AUTONEG_ENABLE || phydev->speed == SPEED_1000) in mv88q2xxx_soft_reset()
265 return phy_write_mmd(phydev, MDIO_MMD_PCS, 0xfe1b, 0x58); in mv88q2xxx_soft_reset()
[all …]
H A Dmxl-86110.c190 * @phydev: pointer to the PHY device structure
201 static int __mxl86110_write_extended_reg(struct phy_device *phydev, in __mxl86110_write_extended_reg() argument
206 ret = __phy_write(phydev, MXL86110_EXTD_REG_ADDR_OFFSET, regnum); in __mxl86110_write_extended_reg()
210 return __phy_write(phydev, MXL86110_EXTD_REG_ADDR_DATA, val); in __mxl86110_write_extended_reg()
215 * @phydev: pointer to the PHY device structure
229 static int __mxl86110_read_extended_reg(struct phy_device *phydev, u16 regnum) in __mxl86110_read_extended_reg() argument
233 ret = __phy_write(phydev, MXL86110_EXTD_REG_ADDR_OFFSET, regnum); in __mxl86110_read_extended_reg()
236 return __phy_read(phydev, MXL86110_EXTD_REG_ADDR_DATA); in __mxl86110_read_extended_reg()
241 * @phydev: pointer to the PHY device structure
252 static int __mxl86110_modify_extended_reg(struct phy_device *phydev, in __mxl86110_modify_extended_reg() argument
[all …]
H A Dbcm54140.c183 struct phy_device *phydev = dev_get_drvdata(dev); in bcm54140_hwmon_read_alarm() local
184 struct bcm54140_priv *priv = phydev->priv; in bcm54140_hwmon_read_alarm()
190 tmp = bcm_phy_read_rdb(phydev, BCM54140_RDB_MON_ISR); in bcm54140_hwmon_read_alarm()
207 struct phy_device *phydev = dev_get_drvdata(dev); in bcm54140_hwmon_read_temp() local
229 tmp = bcm_phy_read_rdb(phydev, reg); in bcm54140_hwmon_read_temp()
241 struct phy_device *phydev = dev_get_drvdata(dev); in bcm54140_hwmon_read_in() local
262 tmp = bcm_phy_read_rdb(phydev, reg); in bcm54140_hwmon_read_in()
312 struct phy_device *phydev = dev_get_drvdata(dev); in bcm54140_hwmon_write_temp() local
330 return bcm_phy_modify_rdb(phydev, reg, mask, in bcm54140_hwmon_write_temp()
337 struct phy_device *phydev = dev_get_drvdata(dev); in bcm54140_hwmon_write_in() local
[all …]
H A Dsmsc.c59 static int smsc_phy_ack_interrupt(struct phy_device *phydev) in smsc_phy_ack_interrupt() argument
61 int rc = phy_read(phydev, MII_LAN83C185_ISF); in smsc_phy_ack_interrupt()
66 int smsc_phy_config_intr(struct phy_device *phydev) in smsc_phy_config_intr() argument
70 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in smsc_phy_config_intr()
71 rc = smsc_phy_ack_interrupt(phydev); in smsc_phy_config_intr()
75 rc = phy_write(phydev, MII_LAN83C185_IM, in smsc_phy_config_intr()
78 rc = phy_write(phydev, MII_LAN83C185_IM, 0); in smsc_phy_config_intr()
82 rc = smsc_phy_ack_interrupt(phydev); in smsc_phy_config_intr()
89 static int smsc_phy_config_edpd(struct phy_device *phydev) in smsc_phy_config_edpd() argument
91 struct smsc_phy_priv *priv = phydev->priv; in smsc_phy_config_edpd()
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H A Das21xxx.c297 static int aeon_firmware_boot(struct phy_device *phydev, const u8 *data, in aeon_firmware_boot() argument
303 ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLB_REG_CPU_CTRL, in aeon_firmware_boot()
308 ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_FW_START_ADDR, in aeon_firmware_boot()
313 ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, in aeon_firmware_boot()
319 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, in aeon_firmware_boot()
322 phydev_err(phydev, "wrong origin mdio_indirect_status: %x\n", val); in aeon_firmware_boot()
330 ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, in aeon_firmware_boot()
336 ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, in aeon_firmware_boot()
342 ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, in aeon_firmware_boot()
348 return phy_modify_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLB_REG_CPU_CTRL, in aeon_firmware_boot()
[all …]
H A Ddp83tg720.c203 * @phydev: Pointer to the phy_device structure.
210 static int dp83tg720_update_stats(struct phy_device *phydev) in dp83tg720_update_stats() argument
212 struct dp83tg720_priv *priv = phydev->priv; in dp83tg720_update_stats()
217 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_LINK_QUAL_3); in dp83tg720_update_stats()
235 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_1); in dp83tg720_update_stats()
241 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_2); in dp83tg720_update_stats()
248 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_3); in dp83tg720_update_stats()
254 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_4); in dp83tg720_update_stats()
260 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_5); in dp83tg720_update_stats()
267 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_6); in dp83tg720_update_stats()
[all …]
H A Ddp83640.c108 struct phy_device *phydev; member
219 static inline int broadcast_write(struct phy_device *phydev, u32 regnum, in broadcast_write() argument
222 return mdiobus_write(phydev->mdio.bus, BROADCAST_ADDR, regnum, val); in broadcast_write()
226 static int ext_read(struct phy_device *phydev, int page, u32 regnum) in ext_read() argument
228 struct dp83640_private *dp83640 = phydev->priv; in ext_read()
232 broadcast_write(phydev, PAGESEL, page); in ext_read()
235 val = phy_read(phydev, regnum); in ext_read()
241 static void ext_write(int broadcast, struct phy_device *phydev, in ext_write() argument
244 struct dp83640_private *dp83640 = phydev->priv; in ext_write()
247 broadcast_write(phydev, PAGESEL, page); in ext_write()
[all …]
/linux/drivers/net/phy/mscc/
H A Dmscc_serdes.c14 static int pll5g_detune(struct phy_device *phydev) in pll5g_detune() argument
19 rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2); in pll5g_detune()
22 ret = vsc85xx_csr_write(phydev, MACRO_CTRL, in pll5g_detune()
25 dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); in pll5g_detune()
29 static int pll5g_tune(struct phy_device *phydev) in pll5g_tune() argument
34 rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2); in pll5g_tune()
36 ret = vsc85xx_csr_write(phydev, MACRO_CTRL, in pll5g_tune()
39 dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); in pll5g_tune()
43 static int vsc85xx_sd6g_pll_cfg_wr(struct phy_device *phydev, in vsc85xx_sd6g_pll_cfg_wr() argument
50 ret = vsc85xx_csr_write(phydev, MACRO_CTRL, in vsc85xx_sd6g_pll_cfg_wr()
[all …]
H A Dmscc_macsec.c22 static u32 vsc8584_macsec_phy_read(struct phy_device *phydev, in vsc8584_macsec_phy_read() argument
29 rc = phy_select_page(phydev, MSCC_PHY_PAGE_MACSEC); in vsc8584_macsec_phy_read()
33 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_20, in vsc8584_macsec_phy_read()
42 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_19, in vsc8584_macsec_phy_read()
49 val = __phy_read(phydev, MSCC_EXT_PAGE_MACSEC_19); in vsc8584_macsec_phy_read()
52 val_l = __phy_read(phydev, MSCC_EXT_PAGE_MACSEC_17); in vsc8584_macsec_phy_read()
53 val_h = __phy_read(phydev, MSCC_EXT_PAGE_MACSEC_18); in vsc8584_macsec_phy_read()
56 phy_restore_page(phydev, rc, rc); in vsc8584_macsec_phy_read()
61 static void vsc8584_macsec_phy_write(struct phy_device *phydev, in vsc8584_macsec_phy_write() argument
67 rc = phy_select_page(phydev, MSCC_PHY_PAGE_MACSEC); in vsc8584_macsec_phy_write()
[all …]
/linux/drivers/net/phy/qcom/
H A Dqca808x.c99 static int qca808x_phy_fast_retrain_config(struct phy_device *phydev) in qca808x_phy_fast_retrain_config() argument
104 ret = genphy_c45_fast_retrain(phydev, true); in qca808x_phy_fast_retrain_config()
108 phy_write_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_TOP_OPTION1, in qca808x_phy_fast_retrain_config()
110 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_20DB, in qca808x_phy_fast_retrain_config()
112 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_17DB, in qca808x_phy_fast_retrain_config()
114 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_27DB, in qca808x_phy_fast_retrain_config()
116 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_28DB, in qca808x_phy_fast_retrain_config()
118 phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_1, in qca808x_phy_fast_retrain_config()
120 phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_4, in qca808x_phy_fast_retrain_config()
122 phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_5, in qca808x_phy_fast_retrain_config()
[all …]
H A Dqcom-phy-lib.c17 int at803x_debug_reg_read(struct phy_device *phydev, u16 reg) in at803x_debug_reg_read() argument
21 ret = phy_write(phydev, AT803X_DEBUG_ADDR, reg); in at803x_debug_reg_read()
25 return phy_read(phydev, AT803X_DEBUG_DATA); in at803x_debug_reg_read()
29 int at803x_debug_reg_mask(struct phy_device *phydev, u16 reg, in at803x_debug_reg_mask() argument
35 ret = at803x_debug_reg_read(phydev, reg); in at803x_debug_reg_mask()
43 return phy_write(phydev, AT803X_DEBUG_DATA, val); in at803x_debug_reg_mask()
47 int at803x_debug_reg_write(struct phy_device *phydev, u16 reg, u16 data) in at803x_debug_reg_write() argument
51 ret = phy_write(phydev, AT803X_DEBUG_ADDR, reg); in at803x_debug_reg_write()
55 return phy_write(phydev, AT803X_DEBUG_DATA, data); in at803x_debug_reg_write()
59 int at803x_set_wol(struct phy_device *phydev, in at803x_set_wol() argument
[all …]
H A Dqca807x.c130 static int qca807x_cable_test_start(struct phy_device *phydev) in qca807x_cable_test_start() argument
136 static int qca807x_led_parse_netdev(struct phy_device *phydev, unsigned long rules, in qca807x_led_parse_netdev() argument
140 switch (phydev->port) { in qca807x_led_parse_netdev()
181 static int qca807x_led_hw_control_enable(struct phy_device *phydev, u8 index) in qca807x_led_hw_control_enable() argument
189 return qca808x_led_reg_hw_control_enable(phydev, reg); in qca807x_led_hw_control_enable()
192 static int qca807x_led_hw_is_supported(struct phy_device *phydev, u8 index, in qca807x_led_hw_is_supported() argument
200 return qca807x_led_parse_netdev(phydev, rules, &offload_trigger); in qca807x_led_hw_is_supported()
203 static int qca807x_led_hw_control_set(struct phy_device *phydev, u8 index, in qca807x_led_hw_control_set() argument
212 ret = qca807x_led_parse_netdev(phydev, rules, &offload_trigger); in qca807x_led_hw_control_set()
216 ret = qca807x_led_hw_control_enable(phydev, index); in qca807x_led_hw_control_set()
[all …]
/linux/drivers/net/phy/mediatek/
H A Dmtk-ge-soc.c386 static int cal_cycle(struct phy_device *phydev, int devad, in cal_cycle() argument
392 phy_modify_mmd(phydev, devad, regnum, in cal_cycle()
394 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN, in cal_cycle()
397 ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, in cal_cycle()
403 phydev_err(phydev, "Calibration cycle timeout\n"); in cal_cycle()
407 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN, in cal_cycle()
409 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CAL_COMP); in cal_cycle()
413 phydev_dbg(phydev, "cal_val: 0x%x, ret: %d\n", cal_val, ret); in cal_cycle()
418 static int rext_fill_result(struct phy_device *phydev, u16 *buf) in rext_fill_result() argument
420 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_ANA_CAL_RG5, in rext_fill_result()
[all …]
H A Dmtk-phy-lib.c14 static void __mtk_tr_access(struct phy_device *phydev, bool read, u8 ch_addr, in __mtk_tr_access() argument
25 dev_dbg(&phydev->mdio.dev, "tr_cmd: 0x%x\n", tr_cmd); in __mtk_tr_access()
26 __phy_write(phydev, 0x10, tr_cmd); in __mtk_tr_access()
29 static void __mtk_tr_read(struct phy_device *phydev, u8 ch_addr, u8 node_addr, in __mtk_tr_read() argument
32 __mtk_tr_access(phydev, true, ch_addr, node_addr, data_addr); in __mtk_tr_read()
33 *tr_low = __phy_read(phydev, 0x11); in __mtk_tr_read()
34 *tr_high = __phy_read(phydev, 0x12); in __mtk_tr_read()
35 dev_dbg(&phydev->mdio.dev, "tr_high read: 0x%x, tr_low read: 0x%x\n", in __mtk_tr_read()
39 static void __mtk_tr_write(struct phy_device *phydev, u8 ch_addr, u8 node_addr, in __mtk_tr_write() argument
42 __phy_write(phydev, 0x11, tr_data & 0xffff); in __mtk_tr_write()
[all …]
/linux/drivers/net/ethernet/hisilicon/hibmcge/
H A Dhbg_mdio.c123 struct phy_device *phydev = priv->mac.phydev; in hbg_flowctrl_cfg() local
130 phy_get_pause(phydev, &tx_pause, &rx_pause); in hbg_flowctrl_cfg()
146 if (!priv->mac.phydev->link) in hbg_fix_np_link_fail()
165 struct phy_device *phydev = netdev->phydev; in hbg_phy_adjust_link() local
168 if (phydev->link != priv->mac.link_status) { in hbg_phy_adjust_link()
169 if (phydev->link) { in hbg_phy_adjust_link()
170 switch (phydev->speed) { in hbg_phy_adjust_link()
185 priv->mac.duplex = phydev->duplex; in hbg_phy_adjust_link()
186 priv->mac.autoneg = phydev->autoneg; in hbg_phy_adjust_link()
187 hbg_hw_adjust_link(priv, speed, phydev->duplex); in hbg_phy_adjust_link()
[all …]
/linux/drivers/net/phy/aquantia/
H A Daquantia_hwmon.c42 static int aqr_hwmon_get(struct phy_device *phydev, int reg, long *value) in aqr_hwmon_get() argument
44 int temp = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_get()
55 static int aqr_hwmon_set(struct phy_device *phydev, int reg, long value) in aqr_hwmon_set() argument
65 return phy_write_mmd(phydev, MDIO_MMD_VEND1, reg, (u16)temp); in aqr_hwmon_set()
68 static int aqr_hwmon_test_bit(struct phy_device *phydev, int reg, int bit) in aqr_hwmon_test_bit() argument
70 int val = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_test_bit()
78 static int aqr_hwmon_status1(struct phy_device *phydev, int bit, long *value) in aqr_hwmon_status1() argument
80 int val = aqr_hwmon_test_bit(phydev, VEND1_GENERAL_STAT1, bit); in aqr_hwmon_status1()
93 struct phy_device *phydev = dev_get_drvdata(dev); in aqr_hwmon_read() local
101 reg = aqr_hwmon_test_bit(phydev, VEND1_THERMAL_STAT2, in aqr_hwmon_read()
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