Lines Matching full:phydev

108 	struct phy_device *phydev;  member
219 static inline int broadcast_write(struct phy_device *phydev, u32 regnum, in broadcast_write() argument
222 return mdiobus_write(phydev->mdio.bus, BROADCAST_ADDR, regnum, val); in broadcast_write()
226 static int ext_read(struct phy_device *phydev, int page, u32 regnum) in ext_read() argument
228 struct dp83640_private *dp83640 = phydev->priv; in ext_read()
232 broadcast_write(phydev, PAGESEL, page); in ext_read()
235 val = phy_read(phydev, regnum); in ext_read()
241 static void ext_write(int broadcast, struct phy_device *phydev, in ext_write() argument
244 struct dp83640_private *dp83640 = phydev->priv; in ext_write()
247 broadcast_write(phydev, PAGESEL, page); in ext_write()
251 broadcast_write(phydev, regnum, val); in ext_write()
253 phy_write(phydev, regnum, val); in ext_write()
308 struct phy_device *phydev = dp83640->phydev; in periodic_output() local
332 ext_write(0, phydev, PAGE5, PTP_TRIG, ptp_trig); in periodic_output()
333 ext_write(0, phydev, PAGE4, PTP_CTL, val); in periodic_output()
346 ext_write(0, phydev, PAGE5, PTP_TRIG, ptp_trig); in periodic_output()
350 ext_write(0, phydev, PAGE4, PTP_CTL, val); in periodic_output()
351 ext_write(0, phydev, PAGE4, PTP_TDR, nsec & 0xffff); /* ns[15:0] */ in periodic_output()
352 ext_write(0, phydev, PAGE4, PTP_TDR, nsec >> 16); /* ns[31:16] */ in periodic_output()
353 ext_write(0, phydev, PAGE4, PTP_TDR, sec & 0xffff); /* sec[15:0] */ in periodic_output()
354 ext_write(0, phydev, PAGE4, PTP_TDR, sec >> 16); /* sec[31:16] */ in periodic_output()
355 ext_write(0, phydev, PAGE4, PTP_TDR, pwidth & 0xffff); /* ns[15:0] */ in periodic_output()
356 ext_write(0, phydev, PAGE4, PTP_TDR, pwidth >> 16); /* ns[31:16] */ in periodic_output()
359 ext_write(0, phydev, PAGE4, PTP_TDR, pwidth & 0xffff); in periodic_output()
360 ext_write(0, phydev, PAGE4, PTP_TDR, pwidth >> 16); in periodic_output()
366 ext_write(0, phydev, PAGE4, PTP_CTL, val); in periodic_output()
378 struct phy_device *phydev = clock->chosen->phydev; in ptp_dp83640_adjfine() local
399 ext_write(1, phydev, PAGE4, PTP_RATEH, hi); in ptp_dp83640_adjfine()
400 ext_write(1, phydev, PAGE4, PTP_RATEL, lo); in ptp_dp83640_adjfine()
411 struct phy_device *phydev = clock->chosen->phydev; in ptp_dp83640_adjtime() local
421 err = tdr_write(1, phydev, &ts, PTP_STEP_CLK); in ptp_dp83640_adjtime()
433 struct phy_device *phydev = clock->chosen->phydev; in ptp_dp83640_gettime() local
438 ext_write(0, phydev, PAGE4, PTP_CTL, PTP_RD_CLK); in ptp_dp83640_gettime()
440 val[0] = ext_read(phydev, PAGE4, PTP_TDR); /* ns[15:0] */ in ptp_dp83640_gettime()
441 val[1] = ext_read(phydev, PAGE4, PTP_TDR); /* ns[31:16] */ in ptp_dp83640_gettime()
442 val[2] = ext_read(phydev, PAGE4, PTP_TDR); /* sec[15:0] */ in ptp_dp83640_gettime()
443 val[3] = ext_read(phydev, PAGE4, PTP_TDR); /* sec[31:16] */ in ptp_dp83640_gettime()
458 struct phy_device *phydev = clock->chosen->phydev; in ptp_dp83640_settime() local
463 err = tdr_write(1, phydev, ts, PTP_LOAD_CLK); in ptp_dp83640_settime()
475 struct phy_device *phydev = clock->chosen->phydev; in ptp_dp83640_enable() local
504 ext_write(0, phydev, PAGE5, PTP_EVNT, evnt); in ptp_dp83640_enable()
539 static void enable_status_frames(struct phy_device *phydev, bool on) in enable_status_frames() argument
541 struct dp83640_private *dp83640 = phydev->priv; in enable_status_frames()
552 ext_write(0, phydev, PAGE5, PSF_CFG0, cfg0); in enable_status_frames()
553 ext_write(0, phydev, PAGE6, PSF_CFG1, ver); in enable_status_frames()
557 if (!phydev->attached_dev) { in enable_status_frames()
558 phydev_warn(phydev, in enable_status_frames()
564 if (dev_mc_add(phydev->attached_dev, status_frame_dst)) in enable_status_frames()
565 phydev_warn(phydev, "failed to add mc address\n"); in enable_status_frames()
567 if (dev_mc_del(phydev->attached_dev, status_frame_dst)) in enable_status_frames()
568 phydev_warn(phydev, "failed to delete mc address\n"); in enable_status_frames()
605 static void enable_broadcast(struct phy_device *phydev, int init_page, int on) in enable_broadcast() argument
609 phy_write(phydev, PAGESEL, 0); in enable_broadcast()
610 val = phy_read(phydev, PHYCR2); in enable_broadcast()
615 phy_write(phydev, PHYCR2, val); in enable_broadcast()
616 phy_write(phydev, PAGESEL, init_page); in enable_broadcast()
625 struct phy_device *master = clock->chosen->phydev; in recalibrate()
641 enable_broadcast(tmp->phydev, clock->page, 1); in recalibrate()
642 tmp->cfg0 = ext_read(tmp->phydev, PAGE5, PSF_CFG0); in recalibrate()
643 ext_write(0, tmp->phydev, PAGE5, PSF_CFG0, 0); in recalibrate()
644 ext_write(0, tmp->phydev, PAGE4, PTP_CTL, PTP_ENABLE); in recalibrate()
659 ext_write(0, tmp->phydev, PAGE5, PTP_EVNT, evnt); in recalibrate()
699 val = ext_read(tmp->phydev, PAGE4, PTP_STS); in recalibrate()
700 phydev_info(tmp->phydev, "slave PTP_STS 0x%04hx\n", val); in recalibrate()
701 val = ext_read(tmp->phydev, PAGE4, PTP_ESTS); in recalibrate()
702 phydev_info(tmp->phydev, "slave PTP_ESTS 0x%04hx\n", val); in recalibrate()
703 event_ts.ns_lo = ext_read(tmp->phydev, PAGE4, PTP_EDATA); in recalibrate()
704 event_ts.ns_hi = ext_read(tmp->phydev, PAGE4, PTP_EDATA); in recalibrate()
705 event_ts.sec_lo = ext_read(tmp->phydev, PAGE4, PTP_EDATA); in recalibrate()
706 event_ts.sec_hi = ext_read(tmp->phydev, PAGE4, PTP_EDATA); in recalibrate()
708 phydev_info(tmp->phydev, "slave offset %lld nanoseconds\n", in recalibrate()
712 tdr_write(0, tmp->phydev, &ts, PTP_STEP_CLK); in recalibrate()
719 ext_write(0, tmp->phydev, PAGE5, PSF_CFG0, tmp->cfg0); in recalibrate()
991 struct phy_device *phydev) in choose_this_phy() argument
996 if (chosen_phy == phydev->mdio.addr) in choose_this_phy()
1054 static int dp83640_soft_reset(struct phy_device *phydev) in dp83640_soft_reset() argument
1058 ret = genphy_soft_reset(phydev); in dp83640_soft_reset()
1071 static int dp83640_config_init(struct phy_device *phydev) in dp83640_config_init() argument
1073 struct dp83640_private *dp83640 = phydev->priv; in dp83640_config_init()
1080 enable_broadcast(phydev, clock->page, 1); in dp83640_config_init()
1084 enable_status_frames(phydev, true); in dp83640_config_init()
1087 ext_write(0, phydev, PAGE4, PTP_CTL, PTP_ENABLE); in dp83640_config_init()
1093 static int dp83640_ack_interrupt(struct phy_device *phydev) in dp83640_ack_interrupt() argument
1095 int err = phy_read(phydev, MII_DP83640_MISR); in dp83640_ack_interrupt()
1103 static int dp83640_config_intr(struct phy_device *phydev) in dp83640_config_intr() argument
1109 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in dp83640_config_intr()
1110 err = dp83640_ack_interrupt(phydev); in dp83640_config_intr()
1114 misr = phy_read(phydev, MII_DP83640_MISR); in dp83640_config_intr()
1122 err = phy_write(phydev, MII_DP83640_MISR, misr); in dp83640_config_intr()
1126 micr = phy_read(phydev, MII_DP83640_MICR); in dp83640_config_intr()
1132 return phy_write(phydev, MII_DP83640_MICR, micr); in dp83640_config_intr()
1134 micr = phy_read(phydev, MII_DP83640_MICR); in dp83640_config_intr()
1140 err = phy_write(phydev, MII_DP83640_MICR, micr); in dp83640_config_intr()
1144 misr = phy_read(phydev, MII_DP83640_MISR); in dp83640_config_intr()
1152 err = phy_write(phydev, MII_DP83640_MISR, misr); in dp83640_config_intr()
1156 return dp83640_ack_interrupt(phydev); in dp83640_config_intr()
1160 static irqreturn_t dp83640_handle_interrupt(struct phy_device *phydev) in dp83640_handle_interrupt() argument
1164 irq_status = phy_read(phydev, MII_DP83640_MISR); in dp83640_handle_interrupt()
1166 phy_error(phydev); in dp83640_handle_interrupt()
1173 phy_trigger_machine(phydev); in dp83640_handle_interrupt()
1268 ext_write(0, dp83640->phydev, PAGE5, PTP_TXCFG0, txcfg0); in dp83640_hwtstamp_set()
1269 ext_write(0, dp83640->phydev, PAGE5, PTP_RXCFG0, rxcfg0); in dp83640_hwtstamp_set()
1401 static int dp83640_probe(struct phy_device *phydev) in dp83640_probe() argument
1407 if (phydev->mdio.addr == BROADCAST_ADDR) in dp83640_probe()
1410 clock = dp83640_clock_get_bus(phydev->mdio.bus); in dp83640_probe()
1418 dp83640->phydev = phydev; in dp83640_probe()
1432 phydev->default_timestamp = true; in dp83640_probe()
1433 phydev->mii_ts = &dp83640->mii_ts; in dp83640_probe()
1434 phydev->priv = dp83640; in dp83640_probe()
1442 if (choose_this_phy(clock, phydev)) { in dp83640_probe()
1445 &phydev->mdio.dev); in dp83640_probe()
1465 static void dp83640_remove(struct phy_device *phydev) in dp83640_remove() argument
1469 struct dp83640_private *tmp, *dp83640 = phydev->priv; in dp83640_remove()
1472 if (phydev->mdio.addr == BROADCAST_ADDR) in dp83640_remove()
1475 phydev->mii_ts = NULL; in dp83640_remove()
1477 enable_status_frames(phydev, false); in dp83640_remove()