Home
last modified time | relevance | path

Searched +full:pcie +full:- +full:mac (Results 1 – 25 of 284) sorted by relevance

12345678910>>...12

/linux/Documentation/devicetree/bindings/net/
H A Dmediatek,net.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Bianconi <lorenzo@kernel.org>
11 - Felix Fietkau <nbd@nbd.name>
20 - mediatek,mt2701-eth
21 - mediatek,mt7623-eth
22 - mediatek,mt7621-eth
23 - mediatek,mt7622-eth
24 - mediatek,mt7629-eth
[all …]
/linux/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_common.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
7 * fm10k_get_bus_info_generic - Generic set PCI bus info
17 /* Get the maximum link width and speed from PCIe config space */ in fm10k_get_bus_info_generic()
22 hw->bus_caps.width = fm10k_bus_width_pcie_x1; in fm10k_get_bus_info_generic()
25 hw->bus_caps.width = fm10k_bus_width_pcie_x2; in fm10k_get_bus_info_generic()
28 hw->bus_caps.width = fm10k_bus_width_pcie_x4; in fm10k_get_bus_info_generic()
31 hw->bus_caps.width = fm10k_bus_width_pcie_x8; in fm10k_get_bus_info_generic()
34 hw->bus_caps.width = fm10k_bus_width_unknown; in fm10k_get_bus_info_generic()
40 hw->bus_caps.speed = fm10k_bus_speed_2500; in fm10k_get_bus_info_generic()
[all …]
H A Dfm10k_pci.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
15 * fm10k_pci_tbl - PCI Device ID Table
35 struct fm10k_intfc *interface = hw->back; in fm10k_read_pci_cfg_word()
38 if (FM10K_REMOVED(hw->hw_addr)) in fm10k_read_pci_cfg_word()
41 pci_read_config_word(interface->pdev, reg, &value); in fm10k_read_pci_cfg_word()
50 u32 __iomem *hw_addr = READ_ONCE(hw->hw_addr); in fm10k_read_reg()
58 struct fm10k_intfc *interface = hw->back; in fm10k_read_reg()
59 struct net_device *netdev = interface->netdev; in fm10k_read_reg()
61 hw->hw_addr = NULL; in fm10k_read_reg()
[all …]
H A Dfm10k_type.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
41 /* PCIe payload size */
53 /* PCIe MSI-X Capability info */
60 /* PCIe SR-IOV Info */
64 #define FM10K_ERR_PARAM -2
65 #define FM10K_ERR_NO_RESOURCES -3
66 #define FM10K_ERR_REQUESTS_PENDING -4
67 #define FM10K_ERR_RESET_REQUESTED -5
68 #define FM10K_ERR_DMA_PENDING -6
[all …]
/linux/drivers/bcma/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
16 # Support for Block-I/O. SELECT this from the driver that needs it.
26 bool "Support for BCMA on PCI-host bus"
46 BCMA bus may have many versions of PCIe core. This driver
48 1) PCIe core working in clientmode
49 2) PCIe Gen 2 clientmode core
51 In general PCIe (Gen 2) clientmode core is required on PCIe
54 This driver is also prerequisite for a hostmode PCIe core
78 bool "ChipCommon-attached serial flash support"
95 bool "BCMA Broadcom GBIT MAC COMMON core driver"
[all …]
/linux/Documentation/networking/
H A Drepresentors.rst1 .. SPDX-License-Identifier: GPL-2.0
9 used to control internal switching on SmartNICs. For the closely-related port
10 representors on physical (multi-port) switches, see
14 ----------
16 Since the mid-2010s, network cards have started offering more complex
17 virtualisation capabilities than the legacy SR-IOV approach (with its simple
18 MAC/VLAN-based switching model) can support. This led to a desire to offload
19 software-defined networks (such as OpenVSwitch) to these NICs to specify the
24 virtual switches and IOV devices. Just as each physical port of a Linux-
42 -----------
[all …]
/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/
H A Dfirmware.c1 // SPDX-License-Identifier: ISC
21 #define BRCMF_FW_NVRAM_DEVPATH_LEN 19 /* devpath0=pcie/1/4/ */
22 #define BRCMF_FW_NVRAM_PCIEDEV_LEN 20 /* pcie/1/4/ + \0 */
36 * struct nvram_parser - internal info for parser.
46 * @multi_dev_v1: detect pcie multi device v1 (compressed).
47 * @multi_dev_v2: detect pcie multi device v2.
49 * @strip_mac: strip the MAC address.
67 * is_nvram_char() - check if char is a valid one for NVRAM entry
91 c = nvp->data[nvp->pos]; in brcmf_nvram_handle_idle()
99 nvp->entry = nvp->pos; in brcmf_nvram_handle_idle()
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pinctrl/mt65xx.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a";
22 stdout-path = "serial0:115200n8";
30 reg_1p8v: regulator-1p8v {
31 compatible = "regulator-fixed";
32 regulator-name = "fixed-1.8V";
33 regulator-min-microvolt = <1800000>;
[all …]
H A Dmt7986a-bananapi-bpi-r3-mini.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Authors: Frank Wunderlich <frank-w@public-files.de>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/pinctrl/mt65xx.h>
19 model = "Bananapi BPI-R3 Mini";
20 chassis-type = "embedded";
21 compatible = "bananapi,bpi-r3mini", "mediatek,mt7986a";
[all …]
H A Dmt7622-bananapi-bpi-r64.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
17 model = "Bananapi BPI-R64";
18 chassis-type = "embedded";
19 compatible = "bananapi,bpi-r64", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
[all …]
H A Dmt7986a-bananapi-bpi-r3.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Frank Wunderlich <frank-w@public-files.de>
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/pinctrl/mt65xx.h>
18 model = "Bananapi BPI-R3";
19 chassis-type = "embedded";
20 compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
[all …]
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629-rfb.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
8 #include <dt-bindings/input/input.h>
13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
26 button-reset {
32 button-wps {
44 reg_3p3v: regulator-3p3v {
[all …]
H A Dmt7623.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/mt2701-clk.h>
13 #include <dt-bindings/pinctrl/mt7623-pinfunc.h>
14 #include <dt-bindings/power/mt2701-power.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/phy/phy.h>
17 #include <dt-bindings/reset/mt2701-resets.h>
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
H A Dhw.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2012 Realtek Corporation.*/
52 rtlpci->reg_bcn_ctrl_val |= set_bits; in _rtl92de_set_bcn_ctrl_reg()
53 rtlpci->reg_bcn_ctrl_val &= ~clear_bits; in _rtl92de_set_bcn_ctrl_reg()
54 rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8) rtlpci->reg_bcn_ctrl_val); in _rtl92de_set_bcn_ctrl_reg()
73 *((u32 *) (val)) = rtlpci->receive_config; in rtl92de_get_hw_reg()
85 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); in rtl92de_set_hw_reg() local
91 if (rtlpci->acm_method != EACMWAY2_SW) in rtl92de_set_hw_reg()
92 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ACM_CTRL, in rtl92de_set_hw_reg()
99 (union aci_aifsn *)(&(mac->ac[0].aifs)); in rtl92de_set_hw_reg()
[all …]
/linux/arch/arm64/boot/dts/apm/
H A Dapm-storm.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dts file for AppliedMicro (APM) X-Gene Storm SOC
9 compatible = "apm,xgene-storm";
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
22 enable-method = "spin-table";
23 cpu-release-addr = <0x1 0x0000fff8>;
[all …]
/linux/drivers/net/ethernet/atheros/atl1e/
H A Datl1e_hw.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
36 * 00-0B-6A-F6-00-DC in atl1e_hw_set_mac_addr()
40 value = (((u32)hw->mac_addr[2]) << 24) | in atl1e_hw_set_mac_addr()
41 (((u32)hw->mac_addr[3]) << 16) | in atl1e_hw_set_mac_addr()
42 (((u32)hw->mac_addr[4]) << 8) | in atl1e_hw_set_mac_addr()
43 (((u32)hw->mac_addr[5])) ; in atl1e_hw_set_mac_addr()
46 value = (((u32)hw->mac_addr[0]) << 8) | in atl1e_hw_set_mac_addr()
47 (((u32)hw->mac_addr[1])) ; in atl1e_hw_set_mac_addr()
53 * return 0 if get valid mac address,
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sdx75-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sdx75-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Imran Shaik <quic_imrashai@quicinc.com>
11 - Taniya Das <quic_tdas@quicinc.com>
17 See also:: include/dt-bindings/clock/qcom,sdx75-gcc.h
21 const: qcom,sdx75-gcc
25 - description: Board XO source
26 - description: Sleep clock source
[all …]
H A Dmvebu-gated-clock.txt12 -----------------------------------
14 1 pex0_en PCIe 0 Clock out
15 2 pex1_en PCIe 1 Clock out
18 5 pex0 PCIe Cntrl 0
19 9 pex1 PCIe Cntrl 1
29 -----------------------------------
33 5 pex0 PCIe 0 Clock out
34 6 pex1 PCIe 1 Clock out
42 19 gop Gigabit Ethernet MAC
56 -----------------------------------
[all …]
/linux/drivers/net/ethernet/emulex/benet/
H A Dbe_cmds.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2005 - 2016 Broadcom
7 * linux-drivers@emulex.com
20 …"Optics faulted/incorrectly installed/not installed - Reseat optics. If issue not resolved, replac…
24 "Uncertified optics – Replace with Avago-certified optics to enable link operation."
35 "Link is non-operational",
103 u32 cmd_privileges = adapter->cmd_privileges; in be_cmd_allowed()
116 return wrb->payload.embedded_payload; in embedded_payload()
121 struct be_queue_info *mccq = &adapter->mcc_obj.q; in be_mcc_notify()
125 return -EIO; in be_mcc_notify()
[all …]
/linux/drivers/net/wireless/realtek/rtw89/
H A Dmac.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
10 #include "mac.h"
43 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_mem_write() local
44 u32 addr = mac->mem_base_addrs[sel] + offset; in rtw89_mac_mem_write()
46 rtw89_write32(rtwdev, mac->filter_model_addr, addr); in rtw89_mac_mem_write()
47 rtw89_write32(rtwdev, mac->indir_access_addr, val); in rtw89_mac_mem_write()
53 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_mem_read() local
54 u32 addr = mac->mem_base_addrs[sel] + offset; in rtw89_mac_mem_read()
56 rtw89_write32(rtwdev, mac->filter_model_addr, addr); in rtw89_mac_mem_read()
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Dsyscon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 represent as any specific type of device. The typical use-case is
13 for some other node's driver, or platform-specific code, to acquire
20 - Lee Jones <lee@kernel.org>
30 - al,alpine-sysfabric-servic
31 - allwinner,sun8i-a83t-system-controller
32 - allwinner,sun8i-h3-system-controller
33 - allwinner,sun8i-v3s-system-controller
[all …]
/linux/arch/powerpc/boot/dts/
H A Dakebono.dts12 /dts-v1/;
17 #address-cells = <2>;
18 #size-cells = <2>;
21 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <1600000000>; // 1.6 GHz
36 timebase-frequency = <100000000>; // 100Mhz
37 i-cache-line-size = <32>;
38 d-cache-line-size = <32>;
[all …]
/linux/drivers/pci/controller/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
7 tristate "Aardvark PCIe controller"
13 Add support for Aardvark 64bit PCIe Host Controller. This
18 tristate "Altera PCIe controller"
21 Say Y here if you want to enable PCIe controller support on Altera
25 tristate "Altera PCIe MSI feature"
29 Say Y here if you want PCIe MSI support for the Altera FPGA.
38 tristate "Apple PCIe controller"
44 Say Y here if you want to enable PCIe controller support on Apple
45 system-on-chips, like the Apple M1. This is required for the USB
[all …]
/linux/drivers/net/ethernet/cavium/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
26 standalone PCIe NIC chip.
36 tristate "Thunder MAC interface driver (BGX)"
42 This driver supports programming and controlling of MAC
46 tristate "Thunder MAC interface driver (RGX)"
105 will be called liquidio_vf. MSI-X interrupt support is required
/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmscc,ocelot.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Oltean <vladimir.oltean@nxp.com>
11 - Claudiu Manoil <claudiu.manoil@nxp.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - UNGLinuxDriver@microchip.com
16 There are multiple switches which are either part of the Ocelot-1 family, or
19 SPI or PCIe. The present DSA binding shall be used when the host controlling
22 Frame DMA or register-based I/O.
[all …]

12345678910>>...12