1c78c5a66SLorenzo Bianconi# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2c78c5a66SLorenzo Bianconi%YAML 1.2 3c78c5a66SLorenzo Bianconi--- 4c78c5a66SLorenzo Bianconi$id: http://devicetree.org/schemas/net/mediatek,net.yaml# 5c78c5a66SLorenzo Bianconi$schema: http://devicetree.org/meta-schemas/core.yaml# 6c78c5a66SLorenzo Bianconi 7c78c5a66SLorenzo Bianconititle: MediaTek Frame Engine Ethernet controller 8c78c5a66SLorenzo Bianconi 9c78c5a66SLorenzo Bianconimaintainers: 10c78c5a66SLorenzo Bianconi - Lorenzo Bianconi <lorenzo@kernel.org> 11c78c5a66SLorenzo Bianconi - Felix Fietkau <nbd@nbd.name> 12c78c5a66SLorenzo Bianconi 13c78c5a66SLorenzo Bianconidescription: 14c78c5a66SLorenzo Bianconi The frame engine ethernet controller can be found on MediaTek SoCs. These SoCs 15c78c5a66SLorenzo Bianconi have dual GMAC ports. 16c78c5a66SLorenzo Bianconi 17c78c5a66SLorenzo Bianconiproperties: 18c78c5a66SLorenzo Bianconi compatible: 19c78c5a66SLorenzo Bianconi enum: 20c78c5a66SLorenzo Bianconi - mediatek,mt2701-eth 21c78c5a66SLorenzo Bianconi - mediatek,mt7623-eth 221cbf487dSDaniel Golle - mediatek,mt7621-eth 23c78c5a66SLorenzo Bianconi - mediatek,mt7622-eth 24c78c5a66SLorenzo Bianconi - mediatek,mt7629-eth 25e3ac1c27SDaniel Golle - mediatek,mt7981-eth 264b139b75SLorenzo Bianconi - mediatek,mt7986-eth 27c94a9aabSDaniel Golle - mediatek,mt7988-eth 28c78c5a66SLorenzo Bianconi - ralink,rt5350-eth 29c78c5a66SLorenzo Bianconi 30c78c5a66SLorenzo Bianconi reg: 31c78c5a66SLorenzo Bianconi maxItems: 1 32c78c5a66SLorenzo Bianconi 33*06ab21c3SKrzysztof Kozlowski clocks: 34*06ab21c3SKrzysztof Kozlowski minItems: 2 35*06ab21c3SKrzysztof Kozlowski maxItems: 24 36*06ab21c3SKrzysztof Kozlowski 37*06ab21c3SKrzysztof Kozlowski clock-names: 38*06ab21c3SKrzysztof Kozlowski minItems: 2 39*06ab21c3SKrzysztof Kozlowski maxItems: 24 400a1e19c8SRob Herring 41c78c5a66SLorenzo Bianconi interrupts: 421cbf487dSDaniel Golle minItems: 1 434b139b75SLorenzo Bianconi maxItems: 4 44c78c5a66SLorenzo Bianconi 45c78c5a66SLorenzo Bianconi power-domains: 46c78c5a66SLorenzo Bianconi maxItems: 1 47c78c5a66SLorenzo Bianconi 48c78c5a66SLorenzo Bianconi resets: 49c78c5a66SLorenzo Bianconi maxItems: 3 50c78c5a66SLorenzo Bianconi 51c78c5a66SLorenzo Bianconi reset-names: 52c78c5a66SLorenzo Bianconi items: 53c78c5a66SLorenzo Bianconi - const: fe 54c78c5a66SLorenzo Bianconi - const: gmac 55c78c5a66SLorenzo Bianconi - const: ppe 56c78c5a66SLorenzo Bianconi 57c78c5a66SLorenzo Bianconi mediatek,ethsys: 58c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 59c78c5a66SLorenzo Bianconi description: 60c78c5a66SLorenzo Bianconi Phandle to the syscon node that handles the port setup. 61c78c5a66SLorenzo Bianconi 62c78c5a66SLorenzo Bianconi cci-control-port: true 63c78c5a66SLorenzo Bianconi 64c78c5a66SLorenzo Bianconi mediatek,hifsys: 65c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 66c78c5a66SLorenzo Bianconi description: 67c78c5a66SLorenzo Bianconi Phandle to the mediatek hifsys controller used to provide various clocks 68c78c5a66SLorenzo Bianconi and reset to the system. 69c78c5a66SLorenzo Bianconi 70c94a9aabSDaniel Golle mediatek,infracfg: 71c94a9aabSDaniel Golle $ref: /schemas/types.yaml#/definitions/phandle 72c94a9aabSDaniel Golle description: 73c94a9aabSDaniel Golle Phandle to the syscon node that handles the path from GMAC to 74c94a9aabSDaniel Golle PHY variants. 75c94a9aabSDaniel Golle 76390b14b5SRob Herring (Arm) mediatek,pcie-mirror: 77390b14b5SRob Herring (Arm) $ref: /schemas/types.yaml#/definitions/phandle 78390b14b5SRob Herring (Arm) description: 79390b14b5SRob Herring (Arm) Phandle to the mediatek pcie-mirror controller. 80390b14b5SRob Herring (Arm) 81390b14b5SRob Herring (Arm) mediatek,pctl: 82390b14b5SRob Herring (Arm) $ref: /schemas/types.yaml#/definitions/phandle 83390b14b5SRob Herring (Arm) description: 84390b14b5SRob Herring (Arm) Phandle to the syscon node that handles the ports slew rate and 85390b14b5SRob Herring (Arm) driver current. 86390b14b5SRob Herring (Arm) 87c78c5a66SLorenzo Bianconi mediatek,sgmiisys: 88c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle-array 89c78c5a66SLorenzo Bianconi minItems: 1 90c78c5a66SLorenzo Bianconi maxItems: 2 91c78c5a66SLorenzo Bianconi items: 92c78c5a66SLorenzo Bianconi maxItems: 1 93c78c5a66SLorenzo Bianconi description: 94c78c5a66SLorenzo Bianconi A list of phandle to the syscon node that handles the SGMII setup which is required for 95c78c5a66SLorenzo Bianconi those SoCs equipped with SGMII. 96c78c5a66SLorenzo Bianconi 9722ecfce1SLorenzo Bianconi mediatek,wed: 9822ecfce1SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle-array 9922ecfce1SLorenzo Bianconi minItems: 2 10022ecfce1SLorenzo Bianconi maxItems: 2 10122ecfce1SLorenzo Bianconi items: 10222ecfce1SLorenzo Bianconi maxItems: 1 10322ecfce1SLorenzo Bianconi description: 10422ecfce1SLorenzo Bianconi List of phandles to wireless ethernet dispatch nodes. 10522ecfce1SLorenzo Bianconi 106e3ac1c27SDaniel Golle mediatek,wed-pcie: 107e3ac1c27SDaniel Golle $ref: /schemas/types.yaml#/definitions/phandle 108e3ac1c27SDaniel Golle description: 109e3ac1c27SDaniel Golle Phandle to the mediatek wed-pcie controller. 110e3ac1c27SDaniel Golle 111c78c5a66SLorenzo Bianconi dma-coherent: true 112c78c5a66SLorenzo Bianconi 113c78c5a66SLorenzo Bianconi mdio-bus: 114c78c5a66SLorenzo Bianconi $ref: mdio.yaml# 115c78c5a66SLorenzo Bianconi unevaluatedProperties: false 116c78c5a66SLorenzo Bianconi 117c78c5a66SLorenzo Bianconi "#address-cells": 118c78c5a66SLorenzo Bianconi const: 1 119c78c5a66SLorenzo Bianconi 120c78c5a66SLorenzo Bianconi "#size-cells": 121c78c5a66SLorenzo Bianconi const: 0 122c78c5a66SLorenzo Bianconi 123c78c5a66SLorenzo BianconiallOf: 1243079bfdbSRob Herring - $ref: ethernet-controller.yaml# 125c78c5a66SLorenzo Bianconi - if: 126c78c5a66SLorenzo Bianconi properties: 127c78c5a66SLorenzo Bianconi compatible: 128c78c5a66SLorenzo Bianconi contains: 129c78c5a66SLorenzo Bianconi enum: 130c78c5a66SLorenzo Bianconi - mediatek,mt2701-eth 131c78c5a66SLorenzo Bianconi - mediatek,mt7623-eth 132c78c5a66SLorenzo Bianconi then: 133c78c5a66SLorenzo Bianconi properties: 1344b139b75SLorenzo Bianconi interrupts: 13555da77deSKrzysztof Kozlowski minItems: 3 1364b139b75SLorenzo Bianconi maxItems: 3 1374b139b75SLorenzo Bianconi 138c78c5a66SLorenzo Bianconi clocks: 139c78c5a66SLorenzo Bianconi minItems: 4 140c78c5a66SLorenzo Bianconi maxItems: 4 141c78c5a66SLorenzo Bianconi 142c78c5a66SLorenzo Bianconi clock-names: 143c78c5a66SLorenzo Bianconi items: 144c78c5a66SLorenzo Bianconi - const: ethif 145c78c5a66SLorenzo Bianconi - const: esw 146c78c5a66SLorenzo Bianconi - const: gp1 147c78c5a66SLorenzo Bianconi - const: gp2 148c78c5a66SLorenzo Bianconi 149c94a9aabSDaniel Golle mediatek,infracfg: false 150c94a9aabSDaniel Golle 15122ecfce1SLorenzo Bianconi mediatek,wed: false 15222ecfce1SLorenzo Bianconi 153e3ac1c27SDaniel Golle mediatek,wed-pcie: false 154390b14b5SRob Herring (Arm) else: 155390b14b5SRob Herring (Arm) properties: 156390b14b5SRob Herring (Arm) mediatek,pctl: false 157e3ac1c27SDaniel Golle 158c78c5a66SLorenzo Bianconi - if: 159c78c5a66SLorenzo Bianconi properties: 160c78c5a66SLorenzo Bianconi compatible: 161c78c5a66SLorenzo Bianconi contains: 1621cbf487dSDaniel Golle enum: 1631cbf487dSDaniel Golle - mediatek,mt7621-eth 1641cbf487dSDaniel Golle then: 1651cbf487dSDaniel Golle properties: 1661cbf487dSDaniel Golle interrupts: 1671cbf487dSDaniel Golle maxItems: 1 1681cbf487dSDaniel Golle 1691cbf487dSDaniel Golle clocks: 1701cbf487dSDaniel Golle minItems: 2 1711cbf487dSDaniel Golle maxItems: 2 1721cbf487dSDaniel Golle 1731cbf487dSDaniel Golle clock-names: 1741cbf487dSDaniel Golle items: 1751cbf487dSDaniel Golle - const: ethif 1761cbf487dSDaniel Golle - const: fe 1771cbf487dSDaniel Golle 178c94a9aabSDaniel Golle mediatek,infracfg: false 179c94a9aabSDaniel Golle 1801cbf487dSDaniel Golle mediatek,wed: false 1811cbf487dSDaniel Golle 1821cbf487dSDaniel Golle mediatek,wed-pcie: false 1831cbf487dSDaniel Golle 1841cbf487dSDaniel Golle - if: 1851cbf487dSDaniel Golle properties: 1861cbf487dSDaniel Golle compatible: 1871cbf487dSDaniel Golle contains: 188c78c5a66SLorenzo Bianconi const: mediatek,mt7622-eth 189c78c5a66SLorenzo Bianconi then: 190c78c5a66SLorenzo Bianconi properties: 1914b139b75SLorenzo Bianconi interrupts: 19255da77deSKrzysztof Kozlowski minItems: 3 1934b139b75SLorenzo Bianconi maxItems: 3 1944b139b75SLorenzo Bianconi 195c78c5a66SLorenzo Bianconi clocks: 196c78c5a66SLorenzo Bianconi minItems: 11 197c78c5a66SLorenzo Bianconi maxItems: 11 198c78c5a66SLorenzo Bianconi 199c78c5a66SLorenzo Bianconi clock-names: 200c78c5a66SLorenzo Bianconi items: 201c78c5a66SLorenzo Bianconi - const: ethif 202c78c5a66SLorenzo Bianconi - const: esw 203c78c5a66SLorenzo Bianconi - const: gp0 204c78c5a66SLorenzo Bianconi - const: gp1 205c78c5a66SLorenzo Bianconi - const: gp2 206c78c5a66SLorenzo Bianconi - const: sgmii_tx250m 207c78c5a66SLorenzo Bianconi - const: sgmii_rx250m 208c78c5a66SLorenzo Bianconi - const: sgmii_cdr_ref 209c78c5a66SLorenzo Bianconi - const: sgmii_cdr_fb 210c78c5a66SLorenzo Bianconi - const: sgmii_ck 211c78c5a66SLorenzo Bianconi - const: eth2pll 212c78c5a66SLorenzo Bianconi 213c94a9aabSDaniel Golle mediatek,infracfg: false 214c94a9aabSDaniel Golle 215c78c5a66SLorenzo Bianconi mediatek,sgmiisys: 216c78c5a66SLorenzo Bianconi minItems: 1 217c78c5a66SLorenzo Bianconi maxItems: 1 218c78c5a66SLorenzo Bianconi 219e3ac1c27SDaniel Golle mediatek,wed-pcie: false 220390b14b5SRob Herring (Arm) else: 221390b14b5SRob Herring (Arm) properties: 222390b14b5SRob Herring (Arm) mediatek,pcie-mirror: false 223e3ac1c27SDaniel Golle 224c78c5a66SLorenzo Bianconi - if: 225c78c5a66SLorenzo Bianconi properties: 226c78c5a66SLorenzo Bianconi compatible: 227c78c5a66SLorenzo Bianconi contains: 228c78c5a66SLorenzo Bianconi const: mediatek,mt7629-eth 229c78c5a66SLorenzo Bianconi then: 230c78c5a66SLorenzo Bianconi properties: 2314b139b75SLorenzo Bianconi interrupts: 23255da77deSKrzysztof Kozlowski minItems: 3 2334b139b75SLorenzo Bianconi maxItems: 3 2344b139b75SLorenzo Bianconi 235c78c5a66SLorenzo Bianconi clocks: 236c78c5a66SLorenzo Bianconi minItems: 17 237c78c5a66SLorenzo Bianconi maxItems: 17 238c78c5a66SLorenzo Bianconi 239c78c5a66SLorenzo Bianconi clock-names: 240c78c5a66SLorenzo Bianconi items: 241c78c5a66SLorenzo Bianconi - const: ethif 242c78c5a66SLorenzo Bianconi - const: sgmiitop 243c78c5a66SLorenzo Bianconi - const: esw 244c78c5a66SLorenzo Bianconi - const: gp0 245c78c5a66SLorenzo Bianconi - const: gp1 246c78c5a66SLorenzo Bianconi - const: gp2 247c78c5a66SLorenzo Bianconi - const: fe 248c78c5a66SLorenzo Bianconi - const: sgmii_tx250m 249c78c5a66SLorenzo Bianconi - const: sgmii_rx250m 250c78c5a66SLorenzo Bianconi - const: sgmii_cdr_ref 251c78c5a66SLorenzo Bianconi - const: sgmii_cdr_fb 252c78c5a66SLorenzo Bianconi - const: sgmii2_tx250m 253c78c5a66SLorenzo Bianconi - const: sgmii2_rx250m 254c78c5a66SLorenzo Bianconi - const: sgmii2_cdr_ref 255c78c5a66SLorenzo Bianconi - const: sgmii2_cdr_fb 256c78c5a66SLorenzo Bianconi - const: sgmii_ck 257c78c5a66SLorenzo Bianconi - const: eth2pll 258c78c5a66SLorenzo Bianconi 259c78c5a66SLorenzo Bianconi mediatek,sgmiisys: 260c78c5a66SLorenzo Bianconi minItems: 2 261c78c5a66SLorenzo Bianconi maxItems: 2 262c78c5a66SLorenzo Bianconi 26322ecfce1SLorenzo Bianconi mediatek,wed: false 26422ecfce1SLorenzo Bianconi 265e3ac1c27SDaniel Golle mediatek,wed-pcie: false 266e3ac1c27SDaniel Golle 267e3ac1c27SDaniel Golle - if: 268e3ac1c27SDaniel Golle properties: 269e3ac1c27SDaniel Golle compatible: 270e3ac1c27SDaniel Golle contains: 271e3ac1c27SDaniel Golle const: mediatek,mt7981-eth 272e3ac1c27SDaniel Golle then: 273e3ac1c27SDaniel Golle properties: 274e3ac1c27SDaniel Golle interrupts: 275e3ac1c27SDaniel Golle minItems: 4 276e3ac1c27SDaniel Golle 277e3ac1c27SDaniel Golle clocks: 278e3ac1c27SDaniel Golle minItems: 15 279e3ac1c27SDaniel Golle maxItems: 15 280e3ac1c27SDaniel Golle 281e3ac1c27SDaniel Golle clock-names: 282e3ac1c27SDaniel Golle items: 283e3ac1c27SDaniel Golle - const: fe 284e3ac1c27SDaniel Golle - const: gp2 285e3ac1c27SDaniel Golle - const: gp1 286e3ac1c27SDaniel Golle - const: wocpu0 287e3ac1c27SDaniel Golle - const: sgmii_ck 288e3ac1c27SDaniel Golle - const: sgmii_tx250m 289e3ac1c27SDaniel Golle - const: sgmii_rx250m 290e3ac1c27SDaniel Golle - const: sgmii_cdr_ref 291e3ac1c27SDaniel Golle - const: sgmii_cdr_fb 292e3ac1c27SDaniel Golle - const: sgmii2_tx250m 293e3ac1c27SDaniel Golle - const: sgmii2_rx250m 294e3ac1c27SDaniel Golle - const: sgmii2_cdr_ref 295e3ac1c27SDaniel Golle - const: sgmii2_cdr_fb 296e3ac1c27SDaniel Golle - const: netsys0 297e3ac1c27SDaniel Golle - const: netsys1 298e3ac1c27SDaniel Golle 299c94a9aabSDaniel Golle mediatek,infracfg: false 300c94a9aabSDaniel Golle 301e3ac1c27SDaniel Golle mediatek,sgmiisys: 302e3ac1c27SDaniel Golle minItems: 2 303e3ac1c27SDaniel Golle maxItems: 2 304e3ac1c27SDaniel Golle 3054b139b75SLorenzo Bianconi - if: 3064b139b75SLorenzo Bianconi properties: 3074b139b75SLorenzo Bianconi compatible: 3084b139b75SLorenzo Bianconi contains: 3094b139b75SLorenzo Bianconi const: mediatek,mt7986-eth 3104b139b75SLorenzo Bianconi then: 3114b139b75SLorenzo Bianconi properties: 3124b139b75SLorenzo Bianconi interrupts: 3134b139b75SLorenzo Bianconi minItems: 4 3144b139b75SLorenzo Bianconi 3154b139b75SLorenzo Bianconi clocks: 3164b139b75SLorenzo Bianconi minItems: 15 3174b139b75SLorenzo Bianconi maxItems: 15 3184b139b75SLorenzo Bianconi 3194b139b75SLorenzo Bianconi clock-names: 3204b139b75SLorenzo Bianconi items: 3214b139b75SLorenzo Bianconi - const: fe 3224b139b75SLorenzo Bianconi - const: gp2 3234b139b75SLorenzo Bianconi - const: gp1 3244b139b75SLorenzo Bianconi - const: wocpu1 3254b139b75SLorenzo Bianconi - const: wocpu0 3264b139b75SLorenzo Bianconi - const: sgmii_tx250m 3274b139b75SLorenzo Bianconi - const: sgmii_rx250m 3284b139b75SLorenzo Bianconi - const: sgmii_cdr_ref 3294b139b75SLorenzo Bianconi - const: sgmii_cdr_fb 3304b139b75SLorenzo Bianconi - const: sgmii2_tx250m 3314b139b75SLorenzo Bianconi - const: sgmii2_rx250m 3324b139b75SLorenzo Bianconi - const: sgmii2_cdr_ref 3334b139b75SLorenzo Bianconi - const: sgmii2_cdr_fb 3344b139b75SLorenzo Bianconi - const: netsys0 3354b139b75SLorenzo Bianconi - const: netsys1 3364b139b75SLorenzo Bianconi 337c94a9aabSDaniel Golle mediatek,infracfg: false 338c94a9aabSDaniel Golle 339c94a9aabSDaniel Golle mediatek,sgmiisys: 340c94a9aabSDaniel Golle minItems: 2 341c94a9aabSDaniel Golle maxItems: 2 342c94a9aabSDaniel Golle 343c94a9aabSDaniel Golle - if: 344c94a9aabSDaniel Golle properties: 345c94a9aabSDaniel Golle compatible: 346c94a9aabSDaniel Golle contains: 347c94a9aabSDaniel Golle const: mediatek,mt7988-eth 348c94a9aabSDaniel Golle then: 349c94a9aabSDaniel Golle properties: 350c94a9aabSDaniel Golle interrupts: 351c94a9aabSDaniel Golle minItems: 4 352c94a9aabSDaniel Golle 353c94a9aabSDaniel Golle clocks: 354cc349b07SDaniel Golle minItems: 24 355cc349b07SDaniel Golle maxItems: 24 356c94a9aabSDaniel Golle 357c94a9aabSDaniel Golle clock-names: 358c94a9aabSDaniel Golle items: 359c94a9aabSDaniel Golle - const: crypto 360c94a9aabSDaniel Golle - const: fe 361c94a9aabSDaniel Golle - const: gp2 362c94a9aabSDaniel Golle - const: gp1 363c94a9aabSDaniel Golle - const: gp3 364c94a9aabSDaniel Golle - const: ethwarp_wocpu2 365c94a9aabSDaniel Golle - const: ethwarp_wocpu1 366c94a9aabSDaniel Golle - const: ethwarp_wocpu0 367c94a9aabSDaniel Golle - const: esw 368c94a9aabSDaniel Golle - const: top_eth_gmii_sel 369c94a9aabSDaniel Golle - const: top_eth_refck_50m_sel 370c94a9aabSDaniel Golle - const: top_eth_sys_200m_sel 371c94a9aabSDaniel Golle - const: top_eth_sys_sel 372c94a9aabSDaniel Golle - const: top_eth_xgmii_sel 373c94a9aabSDaniel Golle - const: top_eth_mii_sel 374c94a9aabSDaniel Golle - const: top_netsys_sel 375c94a9aabSDaniel Golle - const: top_netsys_500m_sel 376c94a9aabSDaniel Golle - const: top_netsys_pao_2x_sel 377c94a9aabSDaniel Golle - const: top_netsys_sync_250m_sel 378c94a9aabSDaniel Golle - const: top_netsys_ppefb_250m_sel 379c94a9aabSDaniel Golle - const: top_netsys_warp_sel 380c94a9aabSDaniel Golle - const: xgp1 381c94a9aabSDaniel Golle - const: xgp2 382c94a9aabSDaniel Golle - const: xgp3 383c94a9aabSDaniel Golle 384c78c5a66SLorenzo BianconipatternProperties: 385c78c5a66SLorenzo Bianconi "^mac@[0-1]$": 386c78c5a66SLorenzo Bianconi type: object 3878469c7f5SRafał Miłecki unevaluatedProperties: false 388c78c5a66SLorenzo Bianconi allOf: 389c78c5a66SLorenzo Bianconi - $ref: ethernet-controller.yaml# 390c78c5a66SLorenzo Bianconi description: 391c78c5a66SLorenzo Bianconi Ethernet MAC node 392c78c5a66SLorenzo Bianconi properties: 393c78c5a66SLorenzo Bianconi compatible: 394c78c5a66SLorenzo Bianconi const: mediatek,eth-mac 395c78c5a66SLorenzo Bianconi 396c78c5a66SLorenzo Bianconi reg: 397c78c5a66SLorenzo Bianconi maxItems: 1 398c78c5a66SLorenzo Bianconi 399c78c5a66SLorenzo Bianconi required: 400c78c5a66SLorenzo Bianconi - reg 401c78c5a66SLorenzo Bianconi - compatible 402c78c5a66SLorenzo Bianconi 403c78c5a66SLorenzo Bianconirequired: 404c78c5a66SLorenzo Bianconi - compatible 405c78c5a66SLorenzo Bianconi - reg 406c78c5a66SLorenzo Bianconi - interrupts 407c78c5a66SLorenzo Bianconi - clocks 408c78c5a66SLorenzo Bianconi - clock-names 409c78c5a66SLorenzo Bianconi - mediatek,ethsys 410c78c5a66SLorenzo Bianconi 411c78c5a66SLorenzo BianconiunevaluatedProperties: false 412c78c5a66SLorenzo Bianconi 413c78c5a66SLorenzo Bianconiexamples: 414c78c5a66SLorenzo Bianconi - | 415c78c5a66SLorenzo Bianconi #include <dt-bindings/interrupt-controller/arm-gic.h> 416c78c5a66SLorenzo Bianconi #include <dt-bindings/interrupt-controller/irq.h> 417c78c5a66SLorenzo Bianconi #include <dt-bindings/clock/mt7622-clk.h> 418c78c5a66SLorenzo Bianconi #include <dt-bindings/power/mt7622-power.h> 419c78c5a66SLorenzo Bianconi 420c78c5a66SLorenzo Bianconi soc { 421c78c5a66SLorenzo Bianconi #address-cells = <2>; 422c78c5a66SLorenzo Bianconi #size-cells = <2>; 423c78c5a66SLorenzo Bianconi 424c78c5a66SLorenzo Bianconi ethernet: ethernet@1b100000 { 425c78c5a66SLorenzo Bianconi compatible = "mediatek,mt7622-eth"; 426c78c5a66SLorenzo Bianconi reg = <0 0x1b100000 0 0x20000>; 427c78c5a66SLorenzo Bianconi interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_LOW>, 428c78c5a66SLorenzo Bianconi <GIC_SPI 224 IRQ_TYPE_LEVEL_LOW>, 429c78c5a66SLorenzo Bianconi <GIC_SPI 225 IRQ_TYPE_LEVEL_LOW>; 430c78c5a66SLorenzo Bianconi clocks = <&topckgen CLK_TOP_ETH_SEL>, 431c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_ESW_EN>, 432c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_GP0_EN>, 433c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_GP1_EN>, 434c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_GP2_EN>, 435c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_TX250M_EN>, 436c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_RX250M_EN>, 437c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_CDR_REF>, 438c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_CDR_FB>, 439c78c5a66SLorenzo Bianconi <&topckgen CLK_TOP_SGMIIPLL>, 440c78c5a66SLorenzo Bianconi <&apmixedsys CLK_APMIXED_ETH2PLL>; 441c78c5a66SLorenzo Bianconi clock-names = "ethif", "esw", "gp0", "gp1", "gp2", 442c78c5a66SLorenzo Bianconi "sgmii_tx250m", "sgmii_rx250m", 443c78c5a66SLorenzo Bianconi "sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii_ck", 444c78c5a66SLorenzo Bianconi "eth2pll"; 445c78c5a66SLorenzo Bianconi power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>; 446c78c5a66SLorenzo Bianconi mediatek,ethsys = <ðsys>; 447c78c5a66SLorenzo Bianconi mediatek,sgmiisys = <&sgmiisys>; 448c78c5a66SLorenzo Bianconi cci-control-port = <&cci_control2>; 449c78c5a66SLorenzo Bianconi mediatek,pcie-mirror = <&pcie_mirror>; 450c78c5a66SLorenzo Bianconi mediatek,hifsys = <&hifsys>; 451c78c5a66SLorenzo Bianconi dma-coherent; 452c78c5a66SLorenzo Bianconi 453c78c5a66SLorenzo Bianconi #address-cells = <1>; 454c78c5a66SLorenzo Bianconi #size-cells = <0>; 455c78c5a66SLorenzo Bianconi 456c78c5a66SLorenzo Bianconi mdio0: mdio-bus { 457c78c5a66SLorenzo Bianconi #address-cells = <1>; 458c78c5a66SLorenzo Bianconi #size-cells = <0>; 459c78c5a66SLorenzo Bianconi 460c78c5a66SLorenzo Bianconi phy0: ethernet-phy@0 { 461c78c5a66SLorenzo Bianconi reg = <0>; 462c78c5a66SLorenzo Bianconi }; 463c78c5a66SLorenzo Bianconi 464c78c5a66SLorenzo Bianconi phy1: ethernet-phy@1 { 465c78c5a66SLorenzo Bianconi reg = <1>; 466c78c5a66SLorenzo Bianconi }; 467c78c5a66SLorenzo Bianconi }; 468c78c5a66SLorenzo Bianconi 469c78c5a66SLorenzo Bianconi gmac0: mac@0 { 470c78c5a66SLorenzo Bianconi compatible = "mediatek,eth-mac"; 471c78c5a66SLorenzo Bianconi phy-mode = "rgmii"; 472c78c5a66SLorenzo Bianconi phy-handle = <&phy0>; 473c78c5a66SLorenzo Bianconi reg = <0>; 474c78c5a66SLorenzo Bianconi }; 475c78c5a66SLorenzo Bianconi 476c78c5a66SLorenzo Bianconi gmac1: mac@1 { 477c78c5a66SLorenzo Bianconi compatible = "mediatek,eth-mac"; 478c78c5a66SLorenzo Bianconi phy-mode = "rgmii"; 479c78c5a66SLorenzo Bianconi phy-handle = <&phy1>; 480c78c5a66SLorenzo Bianconi reg = <1>; 481c78c5a66SLorenzo Bianconi }; 482c78c5a66SLorenzo Bianconi }; 483c78c5a66SLorenzo Bianconi }; 4844b139b75SLorenzo Bianconi 4854b139b75SLorenzo Bianconi - | 4864b139b75SLorenzo Bianconi #include <dt-bindings/interrupt-controller/arm-gic.h> 4874b139b75SLorenzo Bianconi #include <dt-bindings/interrupt-controller/irq.h> 4884b139b75SLorenzo Bianconi #include <dt-bindings/clock/mt7622-clk.h> 4894b139b75SLorenzo Bianconi 4904b139b75SLorenzo Bianconi soc { 4914b139b75SLorenzo Bianconi #address-cells = <2>; 4924b139b75SLorenzo Bianconi #size-cells = <2>; 4934b139b75SLorenzo Bianconi 4944b139b75SLorenzo Bianconi eth: ethernet@15100000 { 4954b139b75SLorenzo Bianconi #define CLK_ETH_FE_EN 0 4964b139b75SLorenzo Bianconi #define CLK_ETH_WOCPU1_EN 3 4974b139b75SLorenzo Bianconi #define CLK_ETH_WOCPU0_EN 4 4984b139b75SLorenzo Bianconi #define CLK_TOP_NETSYS_SEL 43 4994b139b75SLorenzo Bianconi #define CLK_TOP_NETSYS_500M_SEL 44 5004b139b75SLorenzo Bianconi #define CLK_TOP_NETSYS_2X_SEL 46 5014b139b75SLorenzo Bianconi #define CLK_TOP_SGM_325M_SEL 47 5024b139b75SLorenzo Bianconi #define CLK_APMIXED_NET2PLL 1 5034b139b75SLorenzo Bianconi #define CLK_APMIXED_SGMPLL 3 5044b139b75SLorenzo Bianconi 5054b139b75SLorenzo Bianconi compatible = "mediatek,mt7986-eth"; 5064b139b75SLorenzo Bianconi reg = <0 0x15100000 0 0x80000>; 5074b139b75SLorenzo Bianconi interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 5084b139b75SLorenzo Bianconi <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 5094b139b75SLorenzo Bianconi <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 5104b139b75SLorenzo Bianconi <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 5114b139b75SLorenzo Bianconi clocks = <ðsys CLK_ETH_FE_EN>, 5124b139b75SLorenzo Bianconi <ðsys CLK_ETH_GP2_EN>, 5134b139b75SLorenzo Bianconi <ðsys CLK_ETH_GP1_EN>, 5144b139b75SLorenzo Bianconi <ðsys CLK_ETH_WOCPU1_EN>, 5154b139b75SLorenzo Bianconi <ðsys CLK_ETH_WOCPU0_EN>, 5164b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_TX250M_EN>, 5174b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_RX250M_EN>, 5184b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_CDR_REF>, 5194b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_CDR_FB>, 5204b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_TX250M_EN>, 5214b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_RX250M_EN>, 5224b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_CDR_REF>, 5234b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_CDR_FB>, 5244b139b75SLorenzo Bianconi <&topckgen CLK_TOP_NETSYS_SEL>, 5254b139b75SLorenzo Bianconi <&topckgen CLK_TOP_NETSYS_SEL>; 5264b139b75SLorenzo Bianconi clock-names = "fe", "gp2", "gp1", "wocpu1", "wocpu0", 5274b139b75SLorenzo Bianconi "sgmii_tx250m", "sgmii_rx250m", 5284b139b75SLorenzo Bianconi "sgmii_cdr_ref", "sgmii_cdr_fb", 5294b139b75SLorenzo Bianconi "sgmii2_tx250m", "sgmii2_rx250m", 5304b139b75SLorenzo Bianconi "sgmii2_cdr_ref", "sgmii2_cdr_fb", 5314b139b75SLorenzo Bianconi "netsys0", "netsys1"; 5324b139b75SLorenzo Bianconi mediatek,ethsys = <ðsys>; 5334b139b75SLorenzo Bianconi mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>; 5344b139b75SLorenzo Bianconi assigned-clocks = <&topckgen CLK_TOP_NETSYS_2X_SEL>, 5354b139b75SLorenzo Bianconi <&topckgen CLK_TOP_SGM_325M_SEL>; 5364b139b75SLorenzo Bianconi assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>, 5374b139b75SLorenzo Bianconi <&apmixedsys CLK_APMIXED_SGMPLL>; 5384b139b75SLorenzo Bianconi 5394b139b75SLorenzo Bianconi #address-cells = <1>; 5404b139b75SLorenzo Bianconi #size-cells = <0>; 5414b139b75SLorenzo Bianconi 5424b139b75SLorenzo Bianconi mdio: mdio-bus { 5434b139b75SLorenzo Bianconi #address-cells = <1>; 5444b139b75SLorenzo Bianconi #size-cells = <0>; 5454b139b75SLorenzo Bianconi 5464b139b75SLorenzo Bianconi phy5: ethernet-phy@0 { 5474b139b75SLorenzo Bianconi compatible = "ethernet-phy-id67c9.de0a"; 5484b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 5494b139b75SLorenzo Bianconi reset-gpios = <&pio 6 1>; 5504b139b75SLorenzo Bianconi reset-deassert-us = <20000>; 5514b139b75SLorenzo Bianconi reg = <5>; 5524b139b75SLorenzo Bianconi }; 5534b139b75SLorenzo Bianconi 5544b139b75SLorenzo Bianconi phy6: ethernet-phy@1 { 5554b139b75SLorenzo Bianconi compatible = "ethernet-phy-id67c9.de0a"; 5564b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 5574b139b75SLorenzo Bianconi reg = <6>; 5584b139b75SLorenzo Bianconi }; 5594b139b75SLorenzo Bianconi }; 5604b139b75SLorenzo Bianconi 5614b139b75SLorenzo Bianconi mac0: mac@0 { 5624b139b75SLorenzo Bianconi compatible = "mediatek,eth-mac"; 5634b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 5644b139b75SLorenzo Bianconi phy-handle = <&phy5>; 5654b139b75SLorenzo Bianconi reg = <0>; 5664b139b75SLorenzo Bianconi }; 5674b139b75SLorenzo Bianconi 5684b139b75SLorenzo Bianconi mac1: mac@1 { 5694b139b75SLorenzo Bianconi compatible = "mediatek,eth-mac"; 5704b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 5714b139b75SLorenzo Bianconi phy-handle = <&phy6>; 5724b139b75SLorenzo Bianconi reg = <1>; 5734b139b75SLorenzo Bianconi }; 5744b139b75SLorenzo Bianconi }; 5754b139b75SLorenzo Bianconi }; 576