/linux/Documentation/devicetree/bindings/spi/ |
H A D | omap-spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/omap-spi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Aswath Govindraju <a-govindraju@ti.com> 13 - $ref: spi-controller.yaml# 18 - items: 19 - enum: 20 - ti,am654-mcspi 21 - ti,am4372-mcspi [all …]
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/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-am64-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 15 compatible = "ti,am654-timer"; 18 clock-names = "fck"; 19 power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>; 20 ti,timer-pwm; 25 compatible = "ti,am654-timer"; 28 clock-names = "fck"; 29 power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>; 30 ti,timer-pwm; [all …]
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H A D | k3-am62-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 bootph-all; 11 compatible = "pinctrl-single"; 13 #pinctrl-cells = <1>; 14 pinctrl-single,register-width = <32>; 15 pinctrl-single,function-mask = <0xffffffff>; 19 bootph-pre-ram; 20 compatible = "ti,j721e-esm"; 23 ti,esm-pins = <0>, <1>, <2>, <85>; [all …]
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H A D | k3-am62a-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "pinctrl-single"; 12 #pinctrl-cells = <1>; 13 pinctrl-single,register-width = <32>; 14 pinctrl-single,function-mask = <0xffffffff>; 19 compatible = "ti,j721e-esm"; 21 bootph-pre-ram; 23 ti,esm-pins = <0>, <1>, <2>, <85>; 32 compatible = "ti,am654-timer"; [all …]
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H A D | k3-am62p-j722s-common-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "pinctrl-single"; 12 #pinctrl-cells = <1>; 13 pinctrl-single,register-width = <32>; 14 pinctrl-single,function-mask = <0xffffffff>; 15 pinctrl-single,gpio-range = 19 bootph-all; 21 mcu_pmx_range: gpio-range { 22 #pinctrl-single,gpio-range-cells = <3>; [all …]
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H A D | k3-j7200-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 serdes_refclk: serdes-refclk { 10 #clock-cells = <0>; 11 compatible = "fixed-clock"; 17 compatible = "mmio-sram"; 19 #address-cells = <1>; 20 #size-cells = <1>; 23 atf-sram@0 { 28 scm_conf: scm-conf@100000 { [all …]
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H A D | k3-am65-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "simple-bus"; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 cpsw_mac_syscon: ethernet-mac-syscon@200 { 16 compatible = "ti,am62p-cpsw-mac-efuse", "syscon"; 21 compatible = "ti,am654-phy-gmii-sel"; 23 #phy-cells = <1>; 29 compatible = "pinctrl-single"; [all …]
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H A D | k3-j7200-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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H A D | k3-j721e-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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H A D | k3-j721s2-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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H A D | k3-j784s4-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 sms: system-controller@44083000 { 10 bootph-all; 11 compatible = "ti,k2g-sci"; 12 ti,host-id = <12>; 14 mbox-names = "rx", "tx"; 19 reg-names = "debug_messages"; 22 k3_pds: power-controller { 23 bootph-all; [all …]
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H A D | k3-j721s2-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 sms: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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H A D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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H A D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-bindings/mux/mux.h> 11 #include "k3-serdes.h" 14 cmn_refclk: clock-cmnrefclk { 15 #clock-cells = <0>; 16 compatible = "fixed-clock"; 17 clock-frequency = <0>; [all …]
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H A D | k3-j784s4-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/mux/mux.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/phy/phy-ti.h> 12 #include "k3-serdes.h" 15 serdes_refclk: clock-serdes { 16 #clock-cells = <0>; 17 compatible = "fixed-clock"; 25 compatible = "mmio-sram"; [all …]
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H A D | k3-am64-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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H A D | k3-am62a-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 25 #address-cells = <2>; 26 #size-cells = <2>; 28 #interrupt-cells = <3>; [all …]
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H A D | k3-am62p-j722s-common-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 gic500: interrupt-controller@1800000 { 16 compatible = "arm,gic-v3"; 17 #address-cells = <2>; 18 #size-cells = <2>; 20 #interrupt-cells = <3>; [all …]
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H A D | k3-am62-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 19 #address-cells = <2>; 20 #size-cells = <2>; 22 #interrupt-cells = <3>; [all …]
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/linux/arch/arm/boot/dts/ti/omap/ |
H A D | dm814x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 #include <dt-bindings/bus/ti-sysc.h> 4 #include <dt-bindings/clock/dm814.h> 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/dm814x.h> 10 interrupt-parent = <&intc>; 11 #address-cells = <1>; 12 #size-cells = <1>; 30 #address-cells = <1>; 31 #size-cells = <0>; [all …]
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H A D | am437x-l4.dtsi | 2 compatible = "ti,am4-l4-wkup", "simple-pm-bus"; 3 power-domains = <&prm_wkup>; 5 clock-names = "fck"; 10 reg-names = "ap", "la", "ia0", "ia1"; 11 #address-cells = <1>; 12 #size-cells = <1>; 18 compatible = "simple-pm-bus"; 19 #address-cells = <1>; 20 #size-cells = <1>; 28 compatible = "simple-pm-bus"; [all …]
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H A D | omap4-l4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 compatible = "ti,omap4-l4-cfg", "simple-pm-bus"; 4 power-domains = <&prm_core>; 6 clock-names = "fck"; 10 reg-names = "ap", "la", "ia0"; 11 #address-cells = <1>; 12 #size-cells = <1>; 22 compatible = "simple-pm-bus"; 23 #address-cells = <1>; 24 #size-cells = <1>; [all …]
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H A D | omap5-l4.dtsi | 2 compatible = "ti,omap5-l4-cfg", "simple-pm-bus"; 3 power-domains = <&prm_core>; 5 clock-names = "fck"; 9 reg-names = "ap", "la", "ia0"; 10 #address-cells = <1>; 11 #size-cells = <1>; 21 compatible = "simple-pm-bus"; 22 #address-cells = <1>; 23 #size-cells = <1>; 55 target-module@2000 { /* 0x4a002000, ap 3 44.0 */ [all …]
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H A D | dm816x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 #include <dt-bindings/bus/ti-sysc.h> 4 #include <dt-bindings/clock/dm816.h> 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/omap.h> 10 interrupt-parent = <&intc>; 11 #address-cells = <1>; 12 #size-cells = <1>; 26 #address-cells = <1>; 27 #size-cells = <0>; [all …]
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/linux/drivers/spi/ |
H A D | spi-omap2-mcspi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * OMAP2 McSPI controller driver 15 #include <linux/dma-mapping.h> 32 #include <linux/platform_data/spi-omap2-mcspi.h> 49 /* per-channel banks, 0x14 bytes each, first is: */ 56 /* per-register bitmasks: */ 152 struct omap2_mcspi *mcspi = spi_controller_get_devdata(ctlr); in mcspi_write_reg() local 154 writel_relaxed(val, mcspi->base + idx); in mcspi_write_reg() 159 struct omap2_mcspi *mcspi = spi_controller_get_devdata(ctlr); in mcspi_read_reg() local 161 return readl_relaxed(mcspi->base + idx); in mcspi_read_reg() [all …]
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