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Searched +full:mt7621 +full:- +full:pci +full:- +full:phy (Results 1 – 8 of 8) sorted by relevance

/linux/Documentation/devicetree/bindings/phy/
H A Dmediatek,mt7621-pci-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/mediatek,mt7621-pci-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek Mt7621 PCIe PHY
10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
14 const: mediatek,mt7621-pci-phy
22 "#phy-cells":
24 description: selects if the phy is dual-ported
27 - compatible
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/linux/Documentation/devicetree/bindings/pci/
H A Dmediatek,mt7621-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/mediatek,mt7621-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek MT7621 PCIe controller
10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
13 MediaTek MT7621 PCIe subsys supports a single Root Complex (RC)
14 with 3 Root Ports. Each Root Port supports a Gen1 1-lane Link
16 MT7621 PCIe HOST Topology
18 .-------.
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/linux/drivers/phy/ralink/
H A Dphy-mt7621-pci.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Mediatek MT7621 PCI PHY Driver
7 #include <dt-bindings/phy/phy.h>
13 #include <linux/phy/phy.h>
66 * struct mt7621_pci_phy - Mt7621 Pcie PHY core
69 * @phy: pointer to the kernel PHY device
72 * @has_dual_port: if the phy has dual ports.
79 struct phy *phy; member
86 static inline void mt7621_phy_rmw(struct mt7621_pci_phy *phy, in mt7621_phy_rmw() argument
95 * pci setup. Avoid to mask 'set' before set value to 'val' in mt7621_phy_rmw()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # PHY drivers for Ralink platforms.
6 tristate "MediaTek MT7621 PCI PHY Driver"
11 Say 'Y' here to add support for MediaTek MT7621 PCI PHY driver,
14 tristate "Ralink USB PHY driver"
20 This option enables support for the Ralink USB PHY found inside
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_PHY_MT7621_PCI) += phy-mt7621-pci.o
3 obj-$(CONFIG_PHY_RALINK_USB) += phy-ralink-usb.o
/linux/arch/arm64/boot/dts/airoha/
H A Den7581.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/en7523-clk.h>
6 #include <dt-bindings/reset/airoha,en7581-reset.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <2>;
11 #size-cells = <2>;
13 reserved-memory {
14 #address-cells = <2>;
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/linux/drivers/gpio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
50 this symbol, but new drivers should use the generic gpio-regmap
60 non-sleeping contexts. They can make bitbanged serial protocols
81 numberspace-based functionalities of the sysfs interface.
137 Enables support for the idio-16 library functions. The idio-16 library
139 ACCES IDIO-16 family such as the 104-IDIO-16 and the PCI-IDIO-16.
141 If built as a module its name will be gpio-idio-16.
147 tristate "GPIO driver for 74xx-ICs with MMIO access"
151 Say yes here to support GPIO functionality for 74xx-compatible ICs
166 If driver is built as a module it will be called gpio-altera.
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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