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/linux/arch/arm/boot/dts/marvell/
H A Darmada-370-seagate-nas-4bay.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for Seagate NAS 4-Bay (Armada 370 SoC).
13 * Product name : Seagate NAS 4-Bay
14 * Code name (board/PCB) : Dart 4-Bay
19 /dts-v1/;
20 #include "armada-370-seagate-nas-xbay.dtsi"
21 #include <dt-bindings/leds/leds-ns2.h>
24 model = "Seagate NAS 4-Bay (Dart, SRPD40)";
25 compatible = "seagate,dart-4", "marvell,armada370", "marvell,armada-370-xp";
28 internal-regs {
[all …]
H A Dkirkwood-ns2max.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/leds/leds-ns2.h>
5 #include "kirkwood-ns2-common.dtsi"
9 compatible = "lacie,netspace_max_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood";
18 pinctrl-0 = <&pmx_ns2_sata0 &pmx_ns2_sata1>;
19 pinctrl-names = "default";
21 nr-ports = <2>;
26 compatible = "gpio-fan";
31 gpio-fan,speed-map =
[all …]
H A Dkirkwood-ns2mini.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/leds/leds-ns2.h>
5 #include "kirkwood-ns2-common.dtsi"
10 compatible = "lacie,netspace_mini_v2", "marvell,kirkwood-88f6192", "marvell,kirkwood";
19 pinctrl-0 = <&pmx_ns2_sata0>;
20 pinctrl-names = "default";
22 nr-ports = <1>;
27 compatible = "gpio-fan";
32 gpio-fan,speed-map =
[all …]
H A Dkirkwood-is2.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/leds/leds-ns2.h>
5 #include "kirkwood-ns2-common.dtsi"
9 compatible = "lacie,inetspace_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood";
18 pinctrl-0 = <&pmx_ns2_sata0>;
19 pinctrl-names = "default";
21 nr-ports = <1>;
25 ns2-leds {
26 compatible = "lacie,ns2-leds";
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/linux/arch/arm64/boot/dts/qcom/
H A Dsm7125-xiaomi-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/arm/qcom,ids.h>
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16 /delete-node/ &ipa_fw_mem;
17 /delete-node/ &rmtfs_mem;
20 chassis-type = "handset";
22 qcom,msm-id = <QCOM_ID_SM7125 0>;
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H A Dsm8250-samsung-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #address-cells = <2>;
12 #size-cells = <2>;
16 compatible = "simple-framebuffer";
25 gpio_keys: gpio-keys {
26 compatible = "gpio-keys";
28 pinctrl-names = "default";
29 pinctrl-0 = <&vol_up_n>;
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/linux/drivers/leds/
H A Dleds-ns2.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * leds-ns2.c - Driver for the Network Space v2 (and parents) dual-GPIO LED
9 * Based on leds-gpio.c by Raphael Assenat <raph@8d.com>
39 * The Network Space v2 dual-GPIO LED is wired to a CPLD. Three different LED
40 * modes are available: off, on and SATA activity blinking. The LED modes are
62 cmd_level = gpiod_get_value_cansleep(led->cmd); in ns2_led_get_mode()
63 slow_level = gpiod_get_value_cansleep(led->slow); in ns2_led_get_mode()
65 for (i = 0; i < led->num_modes; i++) { in ns2_led_get_mode()
66 if (cmd_level == led->modval[i].cmd_level && in ns2_led_get_mode()
67 slow_level == led->modval[i].slow_level) { in ns2_led_get_mode()
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/linux/drivers/platform/x86/intel/pmc/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
33 #include <asm/intel-family.h>
41 /* Maximum number of modes supported by platfoms that has low power mode capability */
68 return readl(pmc->regbase + reg_offset); in pmc_core_reg_read()
74 writel(val, pmc->regbase + reg_offset); in pmc_core_reg_write()
85 const int lpm_adj_x2 = pmc->map->lpm_res_counter_step_x2; in pmc_core_adjust_slp_s0_step()
87 if (pmc->map == &adl_reg_map) in pmc_core_adjust_slp_s0_step()
90 return (u64)value * pmc->map->slp_s0_res_counter_step; in pmc_core_adjust_slp_s0_step()
95 struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN]; in set_etr3()
96 const struct pmc_reg_map *map = pmc->map; in set_etr3() local
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/linux/include/drm/ttm/
H A Dttm_kmap_iter.h1 /* SPDX-License-Identifier: MIT */
14 * struct ttm_kmap_iter_ops - Ops structure for a struct
17 * mapping a TT through an aperture. Both these modes have
23 * @map_local: Map a PAGE_SIZE part of the resource using
29 * @i: The location within the resource to map. PAGE_SIZE granularity.
47 * struct ttm_kmap_iter - Iterator for kmap_local type operations on a
51 * This struct is intended to be embedded in a resource-specific specialization
55 * replacing some or parts of the ttm_bo_util. cpu-map functionality.
/linux/Documentation/devicetree/bindings/powerpc/
H A Dsleep.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 Devices on SOCs often have mechanisms for placing devices into low-power
15 this information is more complicated than a cell-index property can
21 controller-specific sleep specifier of zero or more cells.
23 The semantics of what type of low power modes are possible are defined
24 by the sleep controller. Some examples of the types of low power modes
27 - Dynamic: The device may be disabled or enabled at any time.
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/linux/drivers/ras/amd/atl/
H A Dmap.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * map.c : Functions to read and decode DRAM address maps
17 ctx->map.intlv_mode = FIELD_GET(DF2_INTLV_NUM_CHAN, ctx->map.base); in df2_get_intlv_mode()
19 if (ctx->map.intlv_mode == 8) in df2_get_intlv_mode()
20 ctx->map.intlv_mode = DF2_2CHAN_HASH; in df2_get_intlv_mode()
22 if (ctx->map.intlv_mode != NONE && in df2_get_intlv_mode()
23 ctx->map.intlv_mode != NOHASH_2CHAN && in df2_get_intlv_mode()
24 ctx->map.intlv_mode != DF2_2CHAN_HASH) in df2_get_intlv_mode()
25 return -EINVAL; in df2_get_intlv_mode()
32 ctx->map.intlv_mode = FIELD_GET(DF3_INTLV_NUM_CHAN, ctx->map.base); in df3_get_intlv_mode()
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/linux/drivers/pinctrl/spear/
H A Dpinctrl-spear.c8 * - U300 Pinctl drivers
9 * - Tegra Pinctl drivers
29 #include "pinctrl-spear.h"
31 #define DRIVER_NAME "spear-pinmux"
42 val = pmx_readl(pmx, muxreg->reg); in muxregs_endisable()
43 val &= ~muxreg->mask; in muxregs_endisable()
46 temp = muxreg->val; in muxregs_endisable()
48 temp = ~muxreg->val; in muxregs_endisable()
50 val |= muxreg->mask & temp; in muxregs_endisable()
51 pmx_writel(pmx, val, muxreg->reg); in muxregs_endisable()
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/linux/drivers/irqchip/
H A Dirq-wpcm450-aic.c1 // SPDX-License-Identifier: GPL-2.0-only
48 writel(0xffffffff, aic->regs + AIC_MDCR); in wpcm450_aic_init_hw()
55 readl(aic->regs + AIC_IPER); in wpcm450_aic_init_hw()
56 writel(0, aic->regs + AIC_EOSCR); in wpcm450_aic_init_hw()
61 aic->regs + AIC_SCR(i)); in wpcm450_aic_init_hw()
69 /* Read IPER to signal that nIRQ can be de-asserted */ in wpcm450_aic_handle_irq()
70 hwirq = readl(aic->regs + AIC_IPER) / 4; in wpcm450_aic_handle_irq()
72 generic_handle_domain_irq(aic->domain, hwirq); in wpcm450_aic_handle_irq()
77 /* Signal end-of-service */ in wpcm450_aic_eoi()
78 writel(0, aic->regs + AIC_EOSCR); in wpcm450_aic_eoi()
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/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-mvebu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
24 #include "pinctrl-mvebu.h"
64 *config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK; in mvebu_mmio_mpp_ctrl_get()
76 reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift); in mvebu_mmio_mpp_ctrl_set()
77 writel(reg | (config << shift), data->base + off); in mvebu_mmio_mpp_ctrl_set()
86 for (n = 0; n < pctl->num_groups; n++) { in mvebu_pinctrl_find_group_by_pid()
87 if (pid >= pctl->groups[n].pins[0] && in mvebu_pinctrl_find_group_by_pid()
88 pid < pctl->groups[n].pins[0] + in mvebu_pinctrl_find_group_by_pid()
89 pctl->groups[n].npins) in mvebu_pinctrl_find_group_by_pid()
[all …]
H A Dpinctrl-mvebu.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 * struct mvebu_mpp_ctrl_data - private data for the mpp ctrl operations
15 * @regmap.map: regmap structure
22 struct regmap *map; member
29 * struct mvebu_mpp_ctrl - describe a mpp control
62 * struct mvebu_mpp_ctrl_setting - describe a mpp ctrl setting
64 * @name: ctrl setting name, e.g. uart2, spi0 - unique per mpp_mode
95 * struct mvebu_mpp_mode - link ctrl and settings
108 * struct mvebu_pinctrl_soc_info - SoC specific info passed to pinctrl-mvebu
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/linux/Documentation/mm/
H A Dovercommit-accounting.rst5 The Linux kernel supports the following overcommit handling modes
56 For a file backed map
57 | SHARED or READ-only - 0 cost (the file is the map not swap)
58 | PRIVATE WRITABLE - size of mapping per instance
60 For an anonymous or ``/dev/zero`` map
61 | SHARED - size of mapping
62 | PRIVATE READ-only - 0 cost (but of little use)
63 | PRIVATE WRITABLE - size of mapping per instance
/linux/drivers/net/dsa/realtek/
H A Drtl8365mb_main.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Realtek SMI subdriver for the Realtek RTL8365MB-VC ethernet switch.
4 * Copyright (C) 2021 Alvin Šipraga <alsi@bang-olufsen.dk>
5 * Copyright (C) 2021 Michael Rasmussen <mir@bang-olufsen.dk>
7 * The RTL8365MB-VC is a 4+1 port 10/100/1000M switch controller. It includes 4
9 * can be connected to the CPU - or another PHY - via either MII, RMII, or
15 * .-----------------------------------.
17 * UTP <---------------> Giga PHY <-> PCS <-> P0 GMAC |
18 * UTP <---------------> Giga PHY <-> PCS <-> P1 GMAC |
19 * UTP <---------------> Giga PHY <-> PCS <-> P2 GMAC |
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/linux/drivers/mtd/chips/
H A Dcfi_probe.c1 // SPDX-License-Identifier: GPL-2.0
18 #include <linux/mtd/map.h>
28 static int cfi_probe_chip(struct map_info *map, __u32 base,
30 static int cfi_chip_setup(struct map_info *map, struct cfi_private *cfi);
32 struct mtd_info *cfi_probe(struct map_info *map);
39 #define xip_allowed(base, map) \ argument
41 (void) map_read(map, base); \
46 #define xip_enable(base, map, cfi) \ argument
48 cfi_qry_mode_off(base, map, cfi); \
49 xip_allowed(base, map); \
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/linux/Documentation/fb/
H A Defifb.rst2 efifb - Generic EFI platform driver
13 - iMac 17"/20"
14 - Macbook
15 - Macbook Pro 15"/17"
16 - MacMini
17 - ARM/ARM64/X86 systems with UEFI firmware
42 nowc Don't map the framebuffer write combined. This can be used
43 to workaround side-effects and slowdowns on other CPU cores
53 <xres>x<yres>[-(rgb|bgr|<bpp>)]
62 of horizontal and vertical resolution). If there are multiple modes
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H A Dframebuffer.rst9 ---------------
13 software to access the graphics hardware through a well-defined interface, so
14 the software doesn't need to know anything about the low-level (hardware
22 --------------------------
39 /dev/fb0current -> fb0
40 /dev/fb1current -> fb1
50 graphics card in addition to the built-in hardware. The corresponding frame
69 --------------------------------
78 the hardware can be queried and set. The color map handling works via ioctls,
82 - You can request unchangeable information about the hardware, like name,
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/linux/drivers/media/rc/keymaps/
H A Drc-khamsin.c1 // SPDX-License-Identifier: GPL-2.0+
4 #include <media/rc-map.h>
9 * SML-5442TW DVB-S/VOD box. The RCU has separate IR (TV) and
10 * BT (STB) modes. This keymap suppors the IR controls.
53 .map = {
H A Drc-winfast-usbii-deluxe.c1 // SPDX-License-Identifier: GPL-2.0+
2 // winfast-usbii-deluxe.h - Keytable for winfast_usbii_deluxe Remote Controller
4 // keymap imported from ir-keymaps.c
8 #include <media/rc-map.h>
40 { 0x72, KEY_VIDEO}, /* INPUT MODES (TV/FM) */
56 .map = {
/linux/include/linux/
H A Dfsl-diu-fb.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
68 /* Word 0(32-bit) in DDR memory */
81 /* Word 1(32-bit) in DDR memory */
84 /* Word 2(32-bit) in DDR memory */
92 /* Word 3(32-bit) in DDR memory */
100 /* Word 4(32-bit) in DDR memory */
108 /* Word 5(32-bit) in DDR memory */
116 /* Word 6(32-bit) in DDR memory */
122 /* Word 7(32-bit) in DDR memory */
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/linux/drivers/iio/dac/
H A Dcio-dac.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * IIO driver for the Measurement Computing CIO-DAC
6 * This driver supports the following Measurement Computing devices: CIO-DAC16,
7 * CIO-DAC08, and PC104-DAC06.
35 MODULE_PARM_DESC(base, "Measurement Computing CIO-DAC base addresses");
59 * struct cio_dac_iio - IIO device private data structure
60 * @map: Regmap for the device
63 struct regmap *map; member
70 const unsigned int offset = chan->channel * CIO_DAC_CHANNEL_STRIDE; in cio_dac_read_raw()
75 return -EINVAL; in cio_dac_read_raw()
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/linux/Documentation/driver-api/cxl/linux/
H A Doverview.rst1 .. SPDX-License-Identifier: GPL-2.0
7 This section presents the configuration process of a CXL Type-3 memory device,
23 b) Memory Map Creation
25 i) EFI Memory Map / E820 Consulted for Soft-Reserved
29 * Soft-Reserved IO Resource created for CFMWS entry
66 * If auto-decoder (BIOS-programmed decoders), driver validates
69 * If user-configured, validation and associations are built at
70 decoder-commit time.
80 a) DAX driver surfaces DAX region as one of two dax device modes
82 * kmem - dax device is converted to hotplug memory blocks
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