Home
last modified time | relevance | path

Searched +full:misc +full:- +full:latch (Results 1 – 25 of 27) sorted by relevance

12

/linux/Documentation/devicetree/bindings/net/wireless/
H A Dqcom,ath11k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Jeff Johnson <jjohnson@kernel.org>
20 - qcom,ipq8074-wifi
21 - qcom,ipq6018-wifi
22 - qcom,wcn6750-wifi
23 - qcom,ipq5018-wifi
32 interrupt-names:
[all …]
/linux/include/uapi/linux/surface_aggregator/
H A Ddtx.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * Surface DTX (clipboard detachment system driver) user-space interface.
5 * Definitions, structs, and IOCTLs for the /dev/surface/dtx misc device. This
6 * device allows user-space to control the clipboard detachment process on
9 * Copyright (C) 2020-2021 Maximilian Luz <luzmaximilian@gmail.com>
34 /* Latch status values */
42 /* Runtime errors (non-critical) */
62 * enum sdtx_device_mode - Mode describing how (and if) the clipboard is
81 * struct sdtx_event - Event provided by reading from the DTX device file.
95 * enum sdtx_event_code - Code describing the type of an event.
[all …]
/linux/include/uapi/linux/
H A Dscc.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
14 #define PRIMUS 0x04 /* hardware type for PRIMUS-PC (DG9BL) card */
67 /* misc. parameters */
141 int command; /* one of the KISS-Commands defined above */
142 unsigned param; /* KISS-Param */
150 io_port vector_latch; /* INTACK-Latch (#) */
161 /* (#) only one INTACK latch allowed. */
/linux/drivers/net/hamradio/
H A Dz8530.h1 /* SPDX-License-Identifier: GPL-2.0 */
35 #define RES_EOM_L 0xC0 /* Reset EOM latch */
91 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
100 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
102 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
117 /* Write Register 10 (misc control bits) */
149 /* Write Register 14 (Misc control bits) */
199 /* Read Register 2 (channel b only) - Interrupt vector */
211 /* Read Register 10 (misc status bits) */
227 #define AUTOEOM 0x02 /* Auto EOM Latch Reset */
/linux/drivers/tty/serial/
H A Dip22zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
67 #define RES_EOM_L 0xC0 /* Reset EOM latch */
126 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
136 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
138 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
153 /* Write Register 10 (misc control bits) */
185 /* Write Register 14 (Misc control bits) */
235 /* Read Register 2 (channel b only) - Interrupt vector */
256 /* Read Register 10 (misc status bits) */
[all …]
H A Dsunzilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
59 #define RES_EOM_L 0xC0 /* Reset EOM latch */
118 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
128 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
130 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
155 /* Write Register 10 (misc control bits) */
187 /* Write Register 14 (Misc control bits) */
239 /* Read Register 2 (channel b only) - Interrupt vector */
264 /* Read Register 10 (misc status bits) */
[all …]
H A Dpmac_zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 * of "escc" node (ie. ch-a or ch-b)
64 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A()
66 return uap->mate; in pmz_get_port_A()
78 writeb(reg, port->control_reg); in read_zsreg()
79 return readb(port->control_reg); in read_zsreg()
85 writeb(reg, port->control_reg); in write_zsreg()
86 writeb(value, port->control_reg); in write_zsreg()
91 return readb(port->data_reg); in read_zsdata()
96 writeb(data, port->data_reg); in write_zsdata()
[all …]
H A Dsc16is7xx.c1 // SPDX-License-Identifier: GPL-2.0+
3 * SC16IS7xx tty serial driver - common code
53 * - only on 75x/76x
56 * - only on 75x/76x
59 * - only on 75x/76x
62 * - only on 75x/76x
71 #define SC16IS7XX_DLL_REG (0x00) /* Divisor Latch Low */
72 #define SC16IS7XX_DLH_REG (0x01) /* Divisor Latch High */
90 /* IER register bits - write only if (EFR[4] == 1) */
103 /* FCR register bits - write only if (EFR[4] == 1) */
[all …]
H A Dsunzilog.c1 // SPDX-License-Identifier: GPL-2.0
48 /* On 32-bit sparcs we need to delay after register accesses
50 * On 64-bit sparc we only need to flush single writes to ensure
61 readb(&((__channel)->control))
105 #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel __iomem *)((PORT)->membase))
108 #define ZS_IS_KEYB(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_KEYB)
109 #define ZS_IS_MOUSE(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_MOUSE)
110 #define ZS_IS_CONS(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CONS)
111 #define ZS_IS_KGDB(UP) ((UP)->flags & SUNZILOG_FLAG_IS_KGDB)
112 #define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & SUNZILOG_FLAG_MODEM_STATUS)
[all …]
/linux/drivers/platform/surface/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Microsoft Surface Platform-Specific Drivers
7 bool "Microsoft Surface Platform-Specific Device Drivers"
11 Say Y here to get to see options for platform-specific device drivers
29 be called surface3-wmi.
47 on 5th- and 6th-generation Microsoft Surface devices (including
55 thermal sensor access, and real-time clock information, depending on
59 tristate "Surface System Aggregator Module User-Space Interface"
62 Provides a misc-device interface to the Surface System Aggregator
67 the SSAM controller. Said client device manages a misc-device
[all …]
H A Dsurface_dtx.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Provides a user-space interface to properly handle clipboard/tablet
9 * use), or request detachment via user-space.
11 * Copyright (C) 2019-2022 Maximilian Luz <luzmaximilian@gmail.com>
34 /* -- SSAM interface. ------------------------------------------------------- */
136 /* -- Main structures. ------------------------------------------------------ */
191 mutex_destroy(&ddev->write_lock); in __sdtx_device_release()
198 kref_get(&ddev->kref); in sdtx_device_get()
206 kref_put(&ddev->kref, __sdtx_device_release); in sdtx_device_put()
210 /* -- Firmware value translations. ------------------------------------------ */
[all …]
/linux/drivers/crypto/caam/
H A Dregs.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * CAAM hardware register-level view
5 * Copyright 2008-2011 Freescale Semiconductor, Inc.
15 #include <linux/io-64-nonatomic-hi-lo.h>
18 * Architecture-specific register access methods
20 * CAAM's bus-addressable registers are 64 bits internally.
21 * They have been wired to be safely accessible on 32-bit
24 * can be treated as two 32-bit entities, or finally (c) if they
25 * must be treated as a single 64-bit value, then this can safely
26 * be done with two 32-bit cycles.
[all …]
/linux/arch/sparc/kernel/
H A Dpci_psycho.c1 // SPDX-License-Identifier: GPL-2.0
33 /* Misc. PSYCHO PCI controller register offsets and definitions. */
99 #define PSYCHO_IOMMU_TSBSZ_1K 0x0000000000000000UL /* TSB Table 1024 8-byte entries */
100 #define PSYCHO_IOMMU_TSBSZ_2K 0x0000000000010000UL /* TSB Table 2048 8-byte entries */
101 #define PSYCHO_IOMMU_TSBSZ_4K 0x0000000000020000UL /* TSB Table 4096 8-byte entries */
102 #define PSYCHO_IOMMU_TSBSZ_8K 0x0000000000030000UL /* TSB Table 8192 8-byte entries */
103 #define PSYCHO_IOMMU_TSBSZ_16K 0x0000000000040000UL /* TSB Table 16k 8-byte entries */
104 #define PSYCHO_IOMMU_TSBSZ_32K 0x0000000000050000UL /* TSB Table 32k 8-byte entries */
105 #define PSYCHO_IOMMU_TSBSZ_64K 0x0000000000060000UL /* TSB Table 64k 8-byte entries */
106 #define PSYCHO_IOMMU_TSBSZ_128K 0x0000000000070000UL /* TSB Table 128k 8-byte entries */
[all …]
/linux/include/linux/mfd/
H A Dmotorola-cpcap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 2007-2009 Motorola, Inc.
179 #define CPCAP_REG_UIL 0x0e5c /* USB Interrupt Latch */
235 #define CPCAP_REG_LGPU 0x1264 /* LMR GCAI GPIO Pull-up */
240 #define CPCAP_REG_LMISC 0x1278 /* LMR Misc Bits */
/linux/drivers/comedi/drivers/
H A Ddt9812.c1 // SPDX-License-Identifier: GPL-2.0+
8 * COMEDI - Linux Control and Measurement Device Interface
78 DT9812_DEVID_DT9812_10, /* 8 2 8 8 1 +/- 10V */
79 DT9812_DEVID_DT9812_2PT5, /* 8 2 8 8 1 0-2.44V */
96 /* Read Flash memory misc config info */
180 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(u8))
193 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / \
208 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / \
239 struct dt9812_private *devpriv = dev->private; in dt9812_read_info()
249 return -ENOMEM; in dt9812_read_info()
[all …]
/linux/drivers/net/ethernet/intel/idpf/
H A Dvirtchnl2.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 * all the structures in this header follow little-endian format.
29 * old misc opcodes to be added in future. Also these opcodes may only
90 * enum virtchnl2_vport_type - Type of virtual port.
98 * enum virtchnl2_queue_model - Type of queue model.
230 * enum virtchnl2_action_types - Available actions for sideband flow steering
254 * enum virtchnl2_txq_sched_mode - Transmit Queue Scheduling Modes.
269 * enum virtchnl2_rxq_flags - Receive Queue Feature flags.
302 * models. With Split Queue model, 2 additional types are introduced -
325 * enum virtchnl2_mac_addr_type - MAC address types.
[all …]
/linux/drivers/net/phy/
H A Dbcm54140.c1 // SPDX-License-Identifier: GPL-2.0+
14 #include "bcm-phy-lib.h"
16 /* RDB per-port registers
45 #define BCM54140_RDB_C_MISC_CTRL 0x02f /* misc copper control */
61 #define BCM54140_RDB_MON_CTRL_SEL_RR 3 /* meassure all round-robin */
62 #define BCM54140_RDB_MON_CTRL_PWR_DOWN BIT(0) /* power-down monitor */
81 * T = 413.35 - (0.49055 * bits[9:0])
83 #define BCM54140_HWMON_TO_TEMP(v) (413350L - (v) * 491)
84 #define BCM54140_HWMON_FROM_TEMP(v) DIV_ROUND_CLOSEST_ULL(413350L - (v), 491)
184 struct bcm54140_priv *priv = phydev->priv; in bcm54140_hwmon_read_alarm()
[all …]
/linux/drivers/net/wireless/ath/ath12k/
H A Dahb.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.
7 #include <linux/dma-mapping.h>
20 { .compatible = "qcom,ipq5332-wifi",
33 "stop-ack"};
36 "misc-pulse1",
37 "misc-latch",
38 "sw-exception",
52 "host2wbm-desc-feed",
[all …]
/linux/drivers/net/wireless/ath/ath11k/
H A Dahb.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.
12 #include <linux/dma-mapping.h>
28 { .compatible = "qcom,ipq8074-wifi",
31 { .compatible = "qcom,ipq6018-wifi",
34 { .compatible = "qcom,wcn6750-wifi",
37 { .compatible = "qcom,ipq5018-wifi",
48 "misc-pulse1",
49 "misc-latch",
[all …]
/linux/drivers/macintosh/
H A Dvia-pmu.c1 // SPDX-License-Identifier: GPL-2.0
9 * to the keyboard and mouse, as well as the non-volatile RAM
13 * Copyright (C) 2001-2002 Benjamin Herrenschmidt
14 * Copyright (C) 2006-2007 Johannes Berg
17 * - Cleanup atomically disabling reply to PMU events after
72 #include "via-pmu-event.h"
82 /* VIA registers - spaced 0x200 bytes apart */
84 #define B 0 /* B-side data */
85 #define A RS /* A-side data */
86 #define DIRB (2*RS) /* B-side direction (1=output) */
[all …]
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_reg.h3 * Copyright (c) 2007-2013 Broadcom Corporation
13 * R - Read only
14 * RC - Clear on read
15 * RW - Read/Write
16 * ST - Statistics register (clear on read)
17 * W - Write only
18 * WB - Wide bus register - the size is over 32 bits and it should be
20 * WR - Write Clear (write 1 to clear the bit)
32 /* [RW 1] Initiate the ATC array - reset all the valid bits */
56 * BRB1_IND_FREE_LIST_PRS_CRDT+2 initialize parser initial credit. Warning -
[all …]
/linux/drivers/media/i2c/
H A Dov2640.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved.
20 #include <linux/v4l2-mediabus.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-event.h>
25 #include <media/v4l2-subdev.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-image-sizes.h>
143 #define MC_BIST 0xF9 /* Microcontroller misc register */
161 #define GAIN 0x00 /* AGC - Gain control gain setting */
[all …]
/linux/arch/x86/kernel/
H A Dapm_32.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* -*- linux-c -*-
4 * Copyright 1994-2001 Stephen Rothwell (sfr@canb.auug.org.au)
16 * (Thanks to Ulrich Windl <Ulrich.Windl@rz.uni-regensburg.de>)
43 * 1.1: support user-space standby and suspend, power off after system
46 * is only incorrect by 30-60mS (vs. 1S previously) (Gabor J. Toth
48 * screen-blanking and gpm (Stephen Rothwell); Linux 1.99.4
63 * <echter@informatik.uni-rostock.de>
109 * <Walter.Hofmann@physik.stud.uni-erlangen.de>).
120 * Remove smp-power-off. SMP users must now specify
[all …]
/linux/drivers/net/ethernet/intel/e1000/
H A De1000_hw.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
422 /* MAC decode size is 128K - This is the size of BAR0 */
443 (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
486 * E1000_RAR_ENTRIES - 1 multicast addresses.
503 /* Receive Descriptor - Extended */
529 /* Receive Descriptor - Packet Split */
553 __le16 length[3]; /* length of buffers 1-3 */
567 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
770 * RW - register is both readable and writable
[all …]
/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_type.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2024 Intel Corporation. */
91 #define IXGBE_BY_MAC(_hw, r) ((_hw)->mvals[IXGBE_CAT(r, IDX)])
281 (0x012300 + (((_i) - 24) * 4)))
285 #define IXGBE_IVAR(_i) (0x00900 + ((_i) * 4)) /* 24 at 0x900-0x960 */
286 #define IXGBE_IVAR_MISC 0x00A00 /* misc MSI-X interrupt causes */
288 #define IXGBE_MSIXT 0x00000 /* MSI-X Table. 0x0000 - 0x01C */
289 #define IXGBE_MSIXPBA 0x02000 /* MSI-X Pending bit array */
298 #define IXGBE_FCRTH_82599(_i) (0x03260 + ((_i) * 4)) /* 8 of these (0-7) */
299 #define IXGBE_FCRTL_82599(_i) (0x03220 + ((_i) * 4)) /* 8 of these (0-7) */
[all …]

12