Home
last modified time | relevance | path

Searched +full:mclk +full:- +full:calibrate (Results 1 – 5 of 5) sorted by relevance

/linux/Documentation/devicetree/bindings/mfd/
H A Drockchip,rk817.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
21 - rockchip,rk809
22 - rockchip,rk817
30 '#clock-cells':
32 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
39 clock-names:
[all …]
/linux/sound/soc/codecs/
H A Des8326.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // es8326.c -- es8326 ALSA SoC audio driver
6 // Authors: David Yang <yangxiaohua@everest-semi.com>
17 #include <sound/soc-dapm.h>
22 struct clk *mclk; member
56 regmap_read(es8326->regma in es8326_crosstalk1_get()
361 u32 mclk; global() member
470 get_coeff(int mclk,int rate,int array,const struct _coeff_div * coeff_div) get_coeff() argument
[all...]
H A Dwm8903.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8903.c -- WM8903 ALSA SoC Audio driver
5 * Copyright 2008-12 Wolfson Microelectronics
6 * Copyright 2011-2012 NVIDIA, Inc.
11 * - TDM mode configuration.
41 { 4, 0x0018 }, /* R4 - Bia
[all...]
/linux/drivers/gpu/drm/amd/pm/
H A Damdgpu_pm.c33 #include <linux/hwmon-sysfs.h>
101 * amdgpu_pm_dev_state_check - Check if device can be accessed.
110 bool runpm_check = runpm ? adev->in_runpm : false; in amdgpu_pm_dev_state_check()
111 bool full_init = (adev->init_lvl->level == AMDGPU_INIT_LEVEL_DEFAULT); in amdgpu_pm_dev_state_check()
114 return -EBUSY; in amdgpu_pm_dev_state_check()
116 if (adev->in_suspend && !runpm_check) in amdgpu_pm_dev_state_check()
117 return -EBUSY; in amdgpu_pm_dev_state_check()
123 * amdgpu_pm_get_access - Check if device can be accessed, resume if needed.
138 return pm_runtime_resume_and_get(adev->dev); in amdgpu_pm_get_access()
142 * amdgpu_pm_get_access_if_active - Check if device is active for access.
[all …]
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega20_hwmgr.c65 (struct vega20_hwmgr *)(hwmgr->backend); in vega20_set_default_registry_data()
67 data->gfxclk_average_alpha = PPVEGA20_VEGA20GFXCLKAVERAGEALPHA_DFLT; in vega20_set_default_registry_data()
68 data->socclk_average_alpha = PPVEGA20_VEGA20SOCCLKAVERAGEALPHA_DFLT; in vega20_set_default_registry_data()
69 data->uclk_average_alpha = PPVEGA20_VEGA20UCLKCLKAVERAGEALPHA_DFLT; in vega20_set_default_registry_data()
70 data->gfx_activity_average_alpha = PPVEGA20_VEGA20GFXACTIVITYAVERAGEALPHA_DFLT; in vega20_set_default_registry_data()
71 data->lowest_uclk_reserved_for_ulv = PPVEGA20_VEGA20LOWESTUCLKRESERVEDFORULV_DFLT; in vega20_set_default_registry_data()
73 data->display_voltage_mode = PPVEGA20_VEGA20DISPLAYVOLTAGEMODE_DFLT; in vega20_set_default_registry_data()
74 data->dcef_clk_quad_eqn_a = PPREGKEY_VEGA20QUADRATICEQUATION_DFLT; in vega20_set_default_registry_data()
75 data->dcef_clk_quad_eqn_b = PPREGKEY_VEGA20QUADRATICEQUATION_DFLT; in vega20_set_default_registry_data()
76 data->dcef_clk_quad_eqn_c = PPREGKEY_VEGA20QUADRATICEQUATION_DFLT; in vega20_set_default_registry_data()
[all …]