Searched +full:jh7110 +full:- +full:pwm (Results 1 – 9 of 9) sorted by relevance
/linux/Documentation/devicetree/bindings/sound/ |
H A D | starfive,jh7110-pwmdac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/starfive,jh7110-pwmdac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: StarFive JH7110 PWM-DAC Controller 10 The PWM-DAC Controller uses PWM square wave generators plus RC filters to 11 form a DAC for audio play in StarFive JH7110 SoC. This audio play controller 16 - Hal Feng <hal.feng@starfivetech.com> 19 - $ref: dai-common.yaml# 23 const: starfive,jh7110-pwmdac [all …]
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | starfive,jh7110-aon-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-aon-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: StarFive JH7110 AON Pin Controller 10 Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd. 15 Some peripherals such as PWM have their I/O go through the 4 "GPIOs". 18 - Jianlong Huang <jianlong.huang@starfivetech.com> 22 const: starfive,jh7110-aon-pinctrl 33 interrupt-controller: true [all …]
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/linux/Documentation/devicetree/bindings/pwm/ |
H A D | opencores,pwm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pwm/opencores,pwm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: OpenCores PWM controller 10 - William Qiu <william.qiu@starfivetech.com> 13 The OpenCores PTC ip core contains a PWM controller. When operating in PWM 14 mode, the PTC core generates binary signal with user-programmable low and 15 high periods. All PTC counters and registers are 32-bit. 18 - $ref: pwm.yaml# [all …]
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/linux/sound/soc/starfive/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 11 tristate "JH7110 PWM-DAC device driver" 16 Say Y or M if you want to add support for StarFive JH7110 17 PWM-DAC driver. 20 tristate "JH7110 TDM device driver"
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H A D | jh7110_pwmdac.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * jh7110_pwmdac.c -- StarFive JH7110 PWM-DAC driver 5 * Copyright (C) 2021-2023 StarFive Technology Co., Ltd. 115 value = jh7110_pwmdac_read_reg(dev->base, JH7110_PWMDAC_CTRL); in jh7110_pwmdac_set_enable() 121 jh7110_pwmdac_write_reg(dev->base, JH7110_PWMDAC_CTRL, value); in jh7110_pwmdac_set_enable() 128 value = jh7110_pwmdac_read_reg(dev->base, JH7110_PWMDAC_CTRL); in jh7110_pwmdac_set_shift() 129 if (dev->cfg.shift == PWMDAC_SHIFT_8) in jh7110_pwmdac_set_shift() 131 else if (dev->cfg.shift == PWMDAC_SHIFT_10) in jh7110_pwmdac_set_shift() 134 jh7110_pwmdac_write_reg(dev->base, JH7110_PWMDAC_CTRL, value); in jh7110_pwmdac_set_shift() 141 value = jh7110_pwmdac_read_reg(dev->base, JH7110_PWMDAC_CTRL); in jh7110_pwmdac_set_duty_cycle() [all …]
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/linux/arch/riscv/boot/dts/starfive/ |
H A D | jh7110.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 8 #include <dt-bindings/clock/starfive,jh7110-crg.h> 9 #include <dt-bindings/power/starfive,jh7110-pmu.h> 10 #include <dt-bindings/reset/starfive,jh7110-crg.h> 11 #include <dt-bindings/thermal/thermal.h> 14 compatible = "starfive,jh7110"; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 #address-cells = <1>; [all …]
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H A D | jh7110-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 8 #include "jh7110.dtsi" 9 #include "jh7110-pinfunc.h" 10 #include <dt-bindings/gpio/gpio.h> 25 stdout-path = "serial0:115200n8"; 33 gpio-restart { 34 compatible = "gpio-restart"; 39 pwmdac_codec: audio-codec { 40 compatible = "linux,spdif-dit"; [all …]
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/linux/drivers/clk/starfive/ |
H A D | clk-starfive-jh7110-sys.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * StarFive JH7110 System Clock Driver 11 #include <linux/clk-provider.h> 17 #include <soc/starfive/reset-starfive-jh71x0.h> 19 #include <dt-bindings/clock/starfive,jh7110-crg.h> 21 #include "clk-starfive-jh7110.h" 216 /* pwm */ 329 unsigned int idx = clkspec->args[0]; in jh7110_sysclk_get() 332 return &priv->reg[idx].hw; in jh7110_sysclk_get() 334 return ERR_PTR(-EINVAL); in jh7110_sysclk_get() [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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