Home
last modified time | relevance | path

Searched full:ipq5018 (Results 1 – 25 of 30) sorted by relevance

12

/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,ipq5018-gcc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,ipq5018-gcc.yaml#
7 title: Qualcomm Global Clock & Reset Controller on IPQ5018
14 domains on IPQ5018
17 include/dt-bindings/clock/qcom,ipq5018-gcc.h
18 include/dt-bindings/reset/qcom,ipq5018-gcc.h
22 const: qcom,gcc-ipq5018
50 compatible = "qcom,gcc-ipq5018";
H A Dqcom,a53pll.yaml19 - qcom,ipq5018-a53pll
H A Dqcom,ipq9574-cmn-pll.yaml27 - qcom,ipq5018-cmn-pll
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dqcom,ipq5018-tlmm.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq5018-tlmm.yaml#
7 title: Qualcomm IPQ5018 TLMM pin controller
14 Top Level Mode Multiplexer pin controller in Qualcomm IPQ5018 SoC.
18 const: qcom,ipq5018-tlmm
36 - $ref: "#/$defs/qcom-ipq5018-tlmm-state"
39 $ref: "#/$defs/qcom-ipq5018-tlmm-state"
43 qcom-ipq5018-tlmm-state:
100 compatible = "qcom,ipq5018-tlmm";
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dipq5018.dtsi3 * IPQ5018 SoC device tree source
10 #include <dt-bindings/clock/qcom,gcc-ipq5018.h>
11 #include <dt-bindings/reset/qcom,gcc-ipq5018.h>
81 compatible = "qcom,scm-ipq5018", "qcom,scm";
139 compatible = "qcom,ipq5018-usb-hsphy";
152 compatible = "qcom,ipq5018-uniphy-pcie-phy";
169 compatible = "qcom,ipq5018-uniphy-pcie-phy";
186 compatible = "qcom,ipq5018-tlmm";
204 compatible = "qcom,gcc-ipq5018";
226 compatible = "qcom,tcsr-ipq5018", "syscon";
[all …]
H A Dipq5018-rdp432-c2.dts3 * IPQ5018 MP03.1-C2 board device tree source
10 #include "ipq5018.dtsi"
15 model = "Qualcomm Technologies, Inc. IPQ5018/AP-RDP432.1-C2";
16 compatible = "qcom,ipq5018-rdp432-c2", "qcom,ipq5018";
H A Dipq5018-tplink-archer-ax55-v1.dts9 #include "ipq5018.dtsi"
13 compatible = "tplink,archer-ax55-v1", "qcom,ipq5018";
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dqcom,ipq5332-uniphy-pcie-phy.yaml14 PCIe and USB combo PHY found in Qualcomm IPQ5018 & IPQ5332 SoCs
19 - qcom,ipq5018-uniphy-pcie-phy
60 - qcom,ipq5018-uniphy-pcie-phy
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dqcom,ipq4019-mdio.yaml17 - qcom,ipq5018-mdio
77 - qcom,ipq5018-mdio
H A Dqca,ar803x.yaml29 const: 7 # This PHY is always at MDIO address 7 in the IPQ5018 SoC
165 #include <dt-bindings/reset/qcom,gcc-ipq5018.h>
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dqcom,ipq5018-cmn-pll.h12 /* The output clocks from CMN PLL of IPQ5018. */
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dqcom,pcie.yaml24 - qcom,pcie-ipq5018
172 - qcom,pcie-ipq5018
334 - qcom,pcie-ipq5018
616 - qcom,pcie-ipq5018
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dqcom,dwc3.yaml28 - qcom,ipq5018-dwc3
288 - qcom,ipq5018-dwc3
409 - qcom,ipq5018-dwc3
H A Dqcom,snps-dwc3.yaml28 - qcom,ipq5018-dwc3
273 - qcom,ipq5018-dwc3
394 - qcom,ipq5018-dwc3
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dqcom,tcsr.yaml44 - qcom,tcsr-ipq5018
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dqcom,spi-qpic-snand.yaml27 - qcom,ipq5018-snand
/freebsd/sys/contrib/device-tree/Bindings/thermal/
H A Dqcom-tsens.yaml42 - qcom,ipq5018-tsens
256 - qcom,ipq5018-tsens
/freebsd/sys/contrib/device-tree/Bindings/nvmem/
H A Dqcom,qfprom.yaml22 - qcom,ipq5018-qfprom
/freebsd/sys/contrib/device-tree/Bindings/watchdog/
H A Dqcom-wdt.yaml21 - qcom,apss-wdt-ipq5018
/freebsd/sys/contrib/device-tree/Bindings/firmware/
H A Dqcom,scm.yaml27 - qcom,scm-ipq5018
/freebsd/sys/contrib/dev/athk/ath11k/
H A Dce.h53 /* CE IE registers are different for IPQ5018 */
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dsdhci-msm.yaml40 - qcom,ipq5018-sdhci
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dqcom.yaml29 ipq5018
372 - qcom,ipq5018-rdp432-c2
374 - const: qcom,ipq5018
/freebsd/sys/contrib/device-tree/Bindings/mailbox/
H A Dqcom,apcs-kpss-global.yaml21 - qcom,ipq5018-apcs-apps-global
/freebsd/sys/contrib/device-tree/Bindings/net/wireless/
H A Dqcom,ath11k.yaml23 - qcom,ipq5018-wifi

12