18ccc0d23SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28ccc0d23SEmmanuel Vadot%YAML 1.2 38ccc0d23SEmmanuel Vadot--- 48ccc0d23SEmmanuel Vadot$id: http://devicetree.org/schemas/spi/qcom,spi-qpic-snand.yaml# 58ccc0d23SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 68ccc0d23SEmmanuel Vadot 78ccc0d23SEmmanuel Vadottitle: Qualcomm QPIC NAND controller 88ccc0d23SEmmanuel Vadot 98ccc0d23SEmmanuel Vadotmaintainers: 108ccc0d23SEmmanuel Vadot - Md sadre Alam <quic_mdalam@quicinc.com> 118ccc0d23SEmmanuel Vadot 128ccc0d23SEmmanuel Vadotdescription: 138ccc0d23SEmmanuel Vadot The QCOM QPIC-SPI-NAND flash controller is an extended version of 148ccc0d23SEmmanuel Vadot the QCOM QPIC NAND flash controller. It can work both in serial 158ccc0d23SEmmanuel Vadot and parallel mode. It supports typical SPI-NAND page cache 168ccc0d23SEmmanuel Vadot operations in single, dual or quad IO mode with pipelined ECC 178ccc0d23SEmmanuel Vadot encoding/decoding using the QPIC ECC HW engine. 188ccc0d23SEmmanuel Vadot 198ccc0d23SEmmanuel VadotallOf: 208ccc0d23SEmmanuel Vadot - $ref: /schemas/spi/spi-controller.yaml# 218ccc0d23SEmmanuel Vadot 228ccc0d23SEmmanuel Vadotproperties: 238ccc0d23SEmmanuel Vadot compatible: 24*ae5de77eSEmmanuel Vadot oneOf: 25*ae5de77eSEmmanuel Vadot - items: 26*ae5de77eSEmmanuel Vadot - enum: 27*ae5de77eSEmmanuel Vadot - qcom,ipq5018-snand 28*ae5de77eSEmmanuel Vadot - const: qcom,ipq9574-snand 29*ae5de77eSEmmanuel Vadot - const: qcom,ipq9574-snand 308ccc0d23SEmmanuel Vadot 318ccc0d23SEmmanuel Vadot reg: 328ccc0d23SEmmanuel Vadot maxItems: 1 338ccc0d23SEmmanuel Vadot 348ccc0d23SEmmanuel Vadot clocks: 358ccc0d23SEmmanuel Vadot maxItems: 3 368ccc0d23SEmmanuel Vadot 378ccc0d23SEmmanuel Vadot clock-names: 388ccc0d23SEmmanuel Vadot items: 398ccc0d23SEmmanuel Vadot - const: core 408ccc0d23SEmmanuel Vadot - const: aon 418ccc0d23SEmmanuel Vadot - const: iom 428ccc0d23SEmmanuel Vadot 438ccc0d23SEmmanuel Vadot dmas: 448ccc0d23SEmmanuel Vadot items: 458ccc0d23SEmmanuel Vadot - description: tx DMA channel 468ccc0d23SEmmanuel Vadot - description: rx DMA channel 478ccc0d23SEmmanuel Vadot - description: cmd DMA channel 488ccc0d23SEmmanuel Vadot 498ccc0d23SEmmanuel Vadot dma-names: 508ccc0d23SEmmanuel Vadot items: 518ccc0d23SEmmanuel Vadot - const: tx 528ccc0d23SEmmanuel Vadot - const: rx 538ccc0d23SEmmanuel Vadot - const: cmd 548ccc0d23SEmmanuel Vadot 558ccc0d23SEmmanuel Vadotrequired: 568ccc0d23SEmmanuel Vadot - compatible 578ccc0d23SEmmanuel Vadot - reg 588ccc0d23SEmmanuel Vadot - clocks 598ccc0d23SEmmanuel Vadot - clock-names 608ccc0d23SEmmanuel Vadot 618ccc0d23SEmmanuel VadotunevaluatedProperties: false 628ccc0d23SEmmanuel Vadot 638ccc0d23SEmmanuel Vadotexamples: 648ccc0d23SEmmanuel Vadot - | 658ccc0d23SEmmanuel Vadot #include <dt-bindings/clock/qcom,ipq9574-gcc.h> 668ccc0d23SEmmanuel Vadot spi@79b0000 { 678ccc0d23SEmmanuel Vadot compatible = "qcom,ipq9574-snand"; 688ccc0d23SEmmanuel Vadot reg = <0x1ac00000 0x800>; 698ccc0d23SEmmanuel Vadot 708ccc0d23SEmmanuel Vadot clocks = <&gcc GCC_QPIC_CLK>, 718ccc0d23SEmmanuel Vadot <&gcc GCC_QPIC_AHB_CLK>, 728ccc0d23SEmmanuel Vadot <&gcc GCC_QPIC_IO_MACRO_CLK>; 738ccc0d23SEmmanuel Vadot clock-names = "core", "aon", "iom"; 748ccc0d23SEmmanuel Vadot 758ccc0d23SEmmanuel Vadot #address-cells = <1>; 768ccc0d23SEmmanuel Vadot #size-cells = <0>; 778ccc0d23SEmmanuel Vadot 788ccc0d23SEmmanuel Vadot flash@0 { 798ccc0d23SEmmanuel Vadot compatible = "spi-nand"; 808ccc0d23SEmmanuel Vadot reg = <0>; 818ccc0d23SEmmanuel Vadot #address-cells = <1>; 828ccc0d23SEmmanuel Vadot #size-cells = <1>; 838ccc0d23SEmmanuel Vadot nand-ecc-engine = <&qpic_nand>; 848ccc0d23SEmmanuel Vadot nand-ecc-strength = <4>; 858ccc0d23SEmmanuel Vadot nand-ecc-step-size = <512>; 868ccc0d23SEmmanuel Vadot }; 878ccc0d23SEmmanuel Vadot }; 88