| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | microchip,pic64gx-pinctrl-gpio2.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/microchip,pic64gx-pinctrl-gpio2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip PIC64GX GPIO2 Mux 10 - Conor Dooley <conor.dooley@microchip.com> 13 The "GPIO2 Mux" determines whether GPIO2 or select other functions are 19 const: microchip,pic64gx-pinctrl-gpio2 24 pinctrl-use-default: true 27 '^mux-': [all …]
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| H A D | airoha,an7583-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/airoha,an7583-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lorenzo Bianconi <lorenzo@kernel.org> 17 const: airoha,an7583-pinctrl 22 gpio-controller: true 24 '#gpio-cells': 27 gpio-ranges: 30 interrupt-controller: true [all …]
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| H A D | brcm,bcm6318-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/brcm,bcm6318-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Álvaro Fernández Rojas <noltari@gmail.com> 11 - Jonas Gorski <jonas.gorski@gmail.com> 14 Bindings for Broadcom's BCM6318 memory-mapped pin controller. 18 const: brcm,bcm6318-pinctrl 24 '-pins$': 26 $ref: pinmux-node.yaml# [all …]
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| H A D | cirrus,lochnagar.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - patches@opensource.cirrus.com 15 Logic devices on mini-cards, as well as allowing connection of various 26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt 29 [3] include/dt-bindings/pinctrl/lochnagar.h 37 - cirrus,lochnagar-pinctrl 39 gpio-controller: true 41 '#gpio-cells': [all …]
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| H A D | ste,nomadik.txt | 4 - compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl", 5 "stericsson,stn8815-pinctrl" 6 - nomadik-gpio-chips: array of phandles to the corresponding GPIO chips 8 - prcm: phandle to the PRCMU managing the back end of this pin controller 10 Please refer to pinctrl-bindings.txt in this directory for details of the 17 mux function to select on those pin(s)/group(s), and various pin configuration 23 (see pinctrl-bindings.txt): 26 - function: A string containing the name of the function to mux to the 28 - groups : An array of strings. Each string contains the name of a pin 29 group that will be combined with the function to form a multiplexing [all …]
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| H A D | brcm,bcm6362-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/brcm,bcm6362-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Álvaro Fernández Rojas <noltari@gmail.com> 11 - Jonas Gorski <jonas.gorski@gmail.com> 14 Bindings for Broadcom's BCM6362 memory-mapped pin controller. 18 const: brcm,bcm6362-pinctrl 24 '-pins$': 26 $ref: pinmux-node.yaml# [all …]
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| H A D | brcm,bcm6368-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/brcm,bcm6368-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Álvaro Fernández Rojas <noltari@gmail.com> 11 - Jonas Gorski <jonas.gorski@gmail.com> 14 Bindings for Broadcom's BCM6368 memory-mapped pin controller. 18 const: brcm,bcm6368-pinctrl 24 '-pins$': 26 $ref: pinmux-node.yaml# [all …]
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| /linux/arch/arm/boot/dts/marvell/ |
| H A D | kirkwood-l-50.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Check Point L-50 Board Description 7 /dts-v1/; 10 #include "kirkwood-6281.dtsi" 13 model = "Check Point L-50"; 14 compatible = "checkpoint,l-50", "marvell,kirkwood-88f6281", "marvell,kirkwood"; 23 stdout-path = &uart0; 27 pinctrl: pin-controller@10000 { 28 pinctrl-0 = <&pmx_led38 &pmx_sysrst &pmx_button29>; 29 pinctrl-names = "default"; [all …]
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| H A D | armada-370-seagate-nas-xbay.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree common file for the Seagate NAS 2 and 4-bay (Armada 370 SoC). 14 #include "armada-370.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/input/input.h> 20 stdout-path = "serial0:115200n8"; 32 internal-regs { 38 nr-ports = <2>; 44 pinctrl-0 = <&ge0_rgmii_pins>; 45 pinctrl-names = "default"; [all …]
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| H A D | armada-370-mirabox.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Gregory CLEMENT <gregory.clement@free-electrons.com> 8 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include "armada-370.dtsi" 14 compatible = "globalscale,mirabox", "marvell,armada370", "marvell,armada-370-xp"; 17 stdout-path = "serial0:115200n8"; 30 internal-regs { 35 clock-frequency = <600000000>; 40 compatible = "gpio-leds"; [all …]
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| /linux/Documentation/devicetree/bindings/hwmon/ |
| H A D | adi,ltc4282.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Nuno Sa <nuno.sa@analog.com> 15 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4282.pdf 20 - adi,ltc4282 25 vdd-supply: true 30 '#clock-cells': 33 adi,rsense-nano-ohms: 36 adi,vin-mode-microvolt: [all …]
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| /linux/arch/arm/boot/dts/nuvoton/ |
| H A D | nuvoton-wpcm450.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 4 #include <dt-bindings/interrupt-controller/irq.h> 8 #address-cells = <1>; 9 #size-cells = <1>; 14 gpio2 = &gpio2; 23 #address-cells = <1>; 24 #size-cells = <0>; 27 compatible = "arm,arm926ej-s"; 33 clk24m: clock-24mhz { 35 compatible = "fixed-clock"; [all …]
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| /linux/drivers/pinctrl/ |
| H A D | pinctrl-palmas.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * pinctrl-palmas.c -- TI PALMAS series pin control driver. 17 #include <linux/pinctrl/pinconf-generic.h> 25 #include "pinctrl-utils.h" 77 PINCTRL_PIN(PALMAS_PIN_GPIO2_REGEN_LED2_PWM2, "gpio2"), 106 "gpio2", 135 "gpio2", 153 "gpio2", 160 "gpio2", 166 "gpio2", [all …]
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| H A D | pinctrl-as3722.c | 1 // SPDX-License-Identifier: GPL-2.0-only 24 #include <linux/pinctrl/pinconf-generic.h> 30 #include "pinctrl-utils.h" 83 PINCTRL_PIN(AS3722_PIN_GPIO2, "gpio2"), 94 "gpio2", 129 FUNCTION_GROUP(interrupt-out, INTERRUPT_OUT), 130 FUNCTION_GROUP(gpio-in-interrupt, GPIO_INTERRUPT), 131 FUNCTION_GROUP(vsup-vbat-low-undebounce-out, VSUB_VBAT_UNDEB_LOW_OUT), 132 FUNCTION_GROUP(vsup-vbat-low-debounce-out, VSUB_VBAT_LOW_DEB_OUT), 133 FUNCTION_GROUP(voltage-in-standby, VOLTAGE_IN_STBY), [all …]
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mm-phyboard-polis-rdk.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/phy/phy-imx8-pcie.h> 11 #include "imx8mm-phycore-som.dtsi" 14 model = "PHYTEC phyBOARD-Polis-i.MX8MM RDK"; 15 compatible = "phytec,imx8mm-phyboard-polis-rdk", 16 "phytec,imx8mm-phycore-som", "fsl,imx8mm"; 19 stdout-path = &uart3; [all …]
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| H A D | imx8mn-venice-gw7902.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/linux-event-codes.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/net/ti-dp83867.h> 17 compatible = "gw,imx8mn-gw7902", "fsl,imx8mn"; 26 stdout-path = &uart2; 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; [all …]
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| H A D | imx8mm-venice-gw7902.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/linux-event-codes.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include <dt-bindings/phy/phy-imx8-pcie.h> 18 compatible = "gw,imx8mm-gw7902", "fsl,imx8mm"; 29 stdout-path = &uart2; 38 compatible = "fixed-clock"; [all …]
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| H A D | fsl-lx2160a-tqmlx2160a-mblx2160a.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright (c) 2020-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/net/ti-dp83867.h> 14 #include "fsl-lx2160a-tqmlx2160a.dtsi" 18 compatible = "tq,lx2160a-tqmlx2160a-mblx2160a", "tq,lx2160a-tqmlx2160a", 31 stdout-path = &uart0; [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | apq8016-schneider-hmibsc.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 /dts-v1/; 9 #include "msm8916-pm8916.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 14 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> 15 #include <dt-bindings/sound/apq8016-lpass.h> 19 compatible = "schneider,apq8016-hmibsc", "qcom,apq8016"; [all …]
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| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | r8a779f0-spider-cpu.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/leds/common.h> 15 compatible = "renesas,spider-cpu", "renesas,r8a779f0"; 30 stdout-path = "serial0:1843200n8"; 34 compatible = "gpio-leds"; 36 led-7 { 39 function = LED_FUNCTION_INDICATOR; 40 function-enumerator = <7>; 43 led-8 { [all …]
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3326-gameforce-chi.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 16 chassis-type = "handset"; 24 stdout-path = "serial2:115200n8"; 27 adc_joystick: adc-joystick { 28 compatible = "adc-joystick"; [all …]
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| H A D | rk3326-odroid-go.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/pinctrl/rockchip.h> 21 stdout-path = "serial2:115200n8"; 25 compatible = "pwm-backlight"; 26 power-supply = <&vcc_bl>; 30 builtin_gamepad: gpio-keys { [all …]
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6ull-uti260b.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 // Copyright (C) 2022-2024 Sebastian Reichel <sre@kernel.org> 4 /dts-v1/; 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/clock/imx6ul-clock.h> 9 #include <dt-bindings/leds/common.h> 12 model = "UNI-T UTi260B Thermal Camera"; 13 compatible = "uni-t,uti260b", "fsl,imx6ull"; 16 stdout-path = "serial0:115200n8"; [all …]
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| /linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3128-xpi-3128.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/leds/common.h> 10 model = "Geniatech XPI-3128"; 11 compatible = "geniatech,xpi-3128", "rockchip,rk3128"; 25 stdout-path = &uart1; 28 adc-keys { 29 compatible = "adc-keys"; 30 io-channels = <&saradc 1>; [all …]
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| /linux/arch/arm/boot/dts/st/ |
| H A D | ste-ux500-samsung-golden.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /dts-v1/; 4 #include "ste-db8500.dtsi" 5 #include "ste-ab8505.dtsi" 6 #include "ste-dbx5x0-pinctrl.dtsi" 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/leds/common.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 14 * You need an intermediate, device-tree compatible bootloader [all …]
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